This started off as preparation for UHBR SST DSC enabling, but escalated
quickly. The SST DSC code is unnecessarily complicated with the platform
differences and ints and fixed points being mixed. Clean it up quite a
bit, reducing the number of lines in the process.
BR,
Jani.
Jani Nikula (14):
drm/i915/dp: Iterate DSC BPP from high to low on all platforms
drm/i915/dp: Add intel_dp_dsc_bpp_step_x16() helper to get DSC BPP
precision
drm/i915/dp: Rename some variables in xelpd_dsc_compute_link_config()
drm/i915/dp: Pass .4 BPP values to
{icl,xelpd}_dsc_compute_link_config()
drm/i915/dp: Move max DSC BPP reduction one level higher
drm/i915/dp: Change icl_dsc_compute_link_config() DSC BPP iteration
drm/i915/dp: Move force_dsc_fractional_bpp_en check to
intel_dp_dsc_valid_bpp()
drm/i915/dp: Unify DSC link config functions
drm/i915/dp: Inline do_dsc_compute_compressed_bpp()
drm/i915/dp: Simplify input BPP checks in
intel_dp_dsc_compute_pipe_bpp()
drm/i915/dp: Use int for compressed BPP in dsc_compute_link_config()
drm/i915/dp: Drop compute_pipe_bpp parameter from
intel_dp_dsc_compute_config()
drm/i915/dp: Pass connector state all the way to
dsc_compute_link_config()
drm/i915/mst: Convert intel_dp_mtp_tu_compute_config() to .4 format
drivers/gpu/drm/i915/display/intel_dp.c | 194 +++++++++-----------
drivers/gpu/drm/i915/display/intel_dp.h | 3 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 54 +++---
drivers/gpu/drm/i915/display/intel_dp_mst.h | 2 +-
4 files changed, 116 insertions(+), 137 deletions(-)
--
2.39.5
