From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Apparently PTL (or I suppose it could have already happened in either MTL or LNL, didn't have either one to check) changes the way the VRR hardwre works by ending the safe window as soon as the push send is triggered. Reorder our DSB programming sequence to account for that, and try to make sure we catch any vblank evasion fails that could cause problems with the new order. Ville Syrjälä (3): drm/i915/dsb: Introduce intel_dsb_poll() drm/i915/vrr: Reorder the DSB "wait for safe window" vs. TRANS_PUSH drm/i915/vrr: Poll for the push send bit to clear on the DSB drivers/gpu/drm/i915/display/intel_color.c | 3 ++ drivers/gpu/drm/i915/display/intel_display.c | 13 ++------ drivers/gpu/drm/i915/display/intel_dsb.c | 19 ++++++++++++ drivers/gpu/drm/i915/display/intel_dsb.h | 3 ++ drivers/gpu/drm/i915/display/intel_vrr.c | 31 ++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 2 ++ 6 files changed, 61 insertions(+), 10 deletions(-) -- 2.45.3
