> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Jouni > Högander > Sent: Thursday, 9 January 2025 12.36 > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; intel-xe@xxxxxxxxxxxxxxxxxxxxx > Cc: Hogander, Jouni <jouni.hogander@xxxxxxxxx> > Subject: [PATCH 2/4] drm/i915/psr: Enable Panel Replay on sink always when it's > supported > > Currently we are configuring Panel Replay on sink when it get's enabled. This > means we need to do full modeset when enabling Panel Replay. This is required > as DP specification is saying sink Panel Replay needs to be configured before link > training. Avoid full modeset by enabling Panel Replay on sink always when it's > supported by the sink and the source. > Reviewed-by: Mika Kahola <mika.kahola@xxxxxxxxx> > Signed-off-by: Jouni Högander <jouni.hogander@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c > b/drivers/gpu/drm/i915/display/intel_ddi.c > index 4f9c50996446..b0ea56e166c5 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -2890,8 +2890,7 @@ static void intel_ddi_pre_enable_dp(struct > intel_atomic_state *state, > crtc_state); > > /* Panel replay has to be enabled in sink dpcd before link training. */ > - if (crtc_state->has_panel_replay) > - intel_psr_enable_sink(enc_to_intel_dp(encoder), crtc_state); > + intel_psr_panel_replay_enable_sink(enc_to_intel_dp(encoder)); > > if (DISPLAY_VER(display) >= 14) > mtl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state); > -- > 2.34.1
