> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of
> Nemesa Garg
> Sent: Monday, September 30, 2024 4:54 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Garg, Nemesa <nemesa.garg@xxxxxxxxx>
> Subject: [PATCH] drm/i915/display: Workaround for odd panning for planar
> yuv
>
> Disable the support for odd x pan for even xsize for NV12 format as
> underrun issue is seen.
>
> WA: 16024459452
>
> v2: Replace HSD with WA in commit message [Suraj]
> Modified the condition for handling odd panning
>
> v3: Simplified the condition for checking hsub
> Using older framework for wa as rev1[Jani]
>
> v4: Modify the condition for hsub [Sai Teja]
> Initialize hsub in else path [Dan]
>
> v5: Replace IS_LUNARLAKE with display version.
> Resolve nitpicks[Jani]
>
> Signed-off-by: Nemesa Garg <nemesa.garg@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_atomic_plane.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index e979786aa5cf..e3401a4f7992 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -1029,6 +1029,14 @@ int intel_plane_check_src_coordinates(struct
> intel_plane_state *plane_state)
> * This allows NV12 and P0xx formats to have odd size
> and/or odd
> * source coordinates on DISPLAY_VER(i915) >= 20
> */
> + /*
> + * Wa_16023981245 for display version 20.
> + * Do not support odd x-panning for even xsize for NV12.
> + */
> + if (DISPLAY_VER(i915) == 20 && fb->format->format ==
> DRM_FORMAT_NV12 &&
> + src_x % 2 != 0 && src_w % 2 == 0)
Also one more issue here according to HSD " Odd Pan position + Even plane size for YVU420 ..... SW decision is to not allow Odd Pan X position"
Which would mean you need to check src_w and src_h instead of src_x to check even plane.
Regards,
Suraj Kandpal
> + return -EINVAL;
> +
> hsub = 1;
> vsub = 1;
> } else {
> --
> 2.25.1
