On Thu, Nov 07, 2013 at 02:49:24PM +0100, Daniel Vetter wrote:
> - Pipe underrun can't just be enabled, we need some support code like
> on ilk-hsw to make this happen. So drop it for now.
> - CRC error is a special mode of the CRC hardware that we don't use,
> so again drop it. Real CRC support for bdw will be added later.
> - All the other error bits are about faults, so rename the #define and
> adjust the output.
>
> v2: Use pipe_name as pointed out by Ville. Ville's comment was on a
> previous patch, but it was easier to squash in here.
>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 10 ++++++----
> drivers/gpu/drm/i915/i915_reg.h | 9 ++++-----
> 2 files changed, 10 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index c04fbbf0acf7..e1bfc85d1789 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -1793,8 +1793,11 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
> intel_finish_page_flip_plane(dev, pipe);
> }
>
> - if (pipe_iir & GEN8_DE_PIPE_IRQ_ERRORS)
> - DRM_ERROR("Errors on pipe %c\n", 'A' + pipe);
> + if (pipe_iir & GEN8_DE_PIPE_IRQ_FAULT_ERRORS) {
> + DRM_ERROR("Fault errors on pipe %c\n: 0x%08x",
> + pipe_name(pipe),
> + pipe_iir & GEN8_DE_PIPE_IRQ_FAULT_ERRORS);
> + }
>
> if (pipe_iir) {
> ret = IRQ_HANDLED;
> @@ -2863,9 +2866,8 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
> {
> struct drm_device *dev = dev_priv->dev;
> uint32_t de_pipe_enables = GEN8_PIPE_FLIP_DONE |
> - GEN8_PIPE_SCAN_LINE_EVENT |
> GEN8_PIPE_VBLANK |
> - GEN8_DE_PIPE_IRQ_ERRORS;
> + GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
> int pipe;
> dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_enables;
> dev_priv->de_irq_mask[PIPE_B] = ~de_pipe_enables;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index f150edaa64ca..9e7588345017 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4064,11 +4064,10 @@
> #define GEN8_PIPE_SCAN_LINE_EVENT (1 << 2)
> #define GEN8_PIPE_VSYNC (1 << 1)
> #define GEN8_PIPE_VBLANK (1 << 0)
> -#define GEN8_DE_PIPE_IRQ_ERRORS (GEN8_PIPE_UNDERRUN | \
> - GEN8_PIPE_CDCLK_CRC_ERROR | \
> - GEN8_PIPE_CURSOR_FAULT | \
> - GEN8_PIPE_SPRITE_FAULT | \
> - GEN8_PIPE_PRIMARY_FAULT)
> +#define GEN8_DE_PIPE_IRQ_FAULT_ERRORS \
> + (GEN8_PIPE_CURSOR_FAULT | \
> + GEN8_PIPE_SPRITE_FAULT | \
> + GEN8_PIPE_PRIMARY_FAULT)
>
> #define GEN8_DE_PORT_ISR 0x44440
> #define GEN8_DE_PORT_IMR 0x44444
> --
> 1.8.4.rc3
--
Ville Syrjälä
Intel OTC
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