Useful for dp aux to work better. Also stop enabling the port A hotplug event - eDP panels are expected to fire that interupt and we're not really ready to deal with them. This is consistent with how we handle port A on ilk-hsw. The more important bit is that we must delay the enabling of hotplug interrupts until all the encoders are fully set up. But we need irq support earlier than that, hence hotplug interrupts can only be enabled in the ->hpd_irq_setup callback. Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx> --- drivers/gpu/drm/i915/i915_irq.c | 19 +++++++++++++++++-- drivers/gpu/drm/i915/i915_reg.h | 3 ++- 2 files changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 370c9281a256..686afe0a98f1 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1778,6 +1778,21 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg) } } + if (master_ctl & GEN8_DE_PORT_IRQ) { + tmp = I915_READ(GEN8_DE_PORT_IIR); + if (tmp & GEN8_AUX_CHANNEL_A_HOTPLUG) + dp_aux_irq_handler(dev); + else if (tmp) + DRM_ERROR("Unexpected DE Port interrupt\n"); + else + DRM_ERROR("The master control interrupt lied (DE PORT)!\n"); + + if (tmp) { + I915_WRITE(GEN8_DE_PORT_IIR, tmp); + ret = IRQ_HANDLED; + } + } + for_each_pipe(pipe) { uint32_t pipe_iir; @@ -2883,8 +2898,8 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) } POSTING_READ(GEN8_DE_PIPE_ISR(0)); - I915_WRITE(GEN8_DE_PORT_IMR, ~_PORT_DP_A_HOTPLUG); - I915_WRITE(GEN8_DE_PORT_IER, _PORT_DP_A_HOTPLUG); + I915_WRITE(GEN8_DE_PORT_IMR, ~GEN8_AUX_CHANNEL_A_HOTPLUG); + I915_WRITE(GEN8_DE_PORT_IER, GEN8_AUX_CHANNEL_A_HOTPLUG); POSTING_READ(GEN8_DE_PORT_IER); } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9e7588345017..be0d98ae97f7 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4073,7 +4073,8 @@ #define GEN8_DE_PORT_IMR 0x44444 #define GEN8_DE_PORT_IIR 0x44448 #define GEN8_DE_PORT_IER 0x4444c -#define _PORT_DP_A_HOTPLUG (1 << 3) +#define GEN8_PORT_DP_A_HOTPLUG (1 << 3) +#define GEN8_AUX_CHANNEL_A_HOTPLUG (1 << 0) #define GEN8_DE_MISC_ISR 0x44460 #define GEN8_DE_MISC_IMR 0x44464 -- 1.8.4.rc3 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx