> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Imre > Deak > Sent: Monday, July 22, 2024 10:25 PM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Subject: [PATCH 14/14] drm/i915/dp_mst: Enable LT fallback between > UHBR/non-UHBR link rates > > Enable switching between UHBR and non-UHBR link rates on MST links > when reducing the link parameters after an LT failure. > > Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_dp_link_training.c | 5 ----- > 1 file changed, 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c > b/drivers/gpu/drm/i915/display/intel_dp_link_training.c > index 0c8e0d6437b5b..270080b2735f2 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c > @@ -1188,11 +1188,6 @@ static bool > reduce_link_params_in_bw_order(struct intel_dp *intel_dp, > intel_dp->link.force_lane_count != lane_count)) > continue; > > - /* TODO: Make switching from UHBR to non-UHBR rates > work. */ > - if (drm_dp_is_uhbr_rate(crtc_state->port_clock) != > - drm_dp_is_uhbr_rate(link_rate)) > - continue; > - Do we need to remove this here, I mean why introduce this piece of todo code to begin with specially in this function as reduce_link_params_in_bw_order is being defined in this series in one of the previous patches. Just omit this condition while defining it Regards, Suraj Kandpal > } > > -- > 2.44.2
