This patchset enables the link training fallback on MST links between
UHBR and non-UHBR link rates. As a dependency it also switches the
fallback to happen in a link configuration sequence ordered by BW and
makes sure that the MST BW reported via the ENUM_PATH_RESOURCES message
is always up-to-date in the MST topology SW state.
Imre Deak (14):
drm/dp_mst: Factor out function to queue a topology probe work
drm/dp_mst: Add a helper to queue a topology probe
drm/dp_mst: Simplify the condition when to enumerate path resources
drm/i915/ddi: For an active output call the DP encoder sync_state()
only for DP
drm/i915/dp: Initialize the link parameters during HW readout
drm/i915/dp: Send only a single modeset-retry uevent for a commit
drm/i915/dp: Add a separate function to reduce the link parameters
drm/i915/dp: Add helpers to set link training mode, BW parameters
drm/i915/dp_mst: Reduce the link parameters in BW order after LT
failures
drm/i915/dp_mst: Configure MST after the link parameters are reset
drm/i915/dp_mst: Queue modeset-retry after a failed payload BW
allocation
drm/i915/dp_mst: Reprobe the MST topology after a link parameter
change
drm/i915/dp_mst: Ensure link parameters are up-to-date for a disabled
link
drm/i915/dp_mst: Enable LT fallback between UHBR/non-UHBR link rates
drivers/gpu/drm/display/drm_dp_mst_topology.c | 55 ++++++--
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +-
.../drm/i915/display/intel_display_types.h | 21 +++
drivers/gpu/drm/i915/display/intel_dp.c | 131 +++++++++++++++++-
drivers/gpu/drm/i915/display/intel_dp.h | 2 +
.../drm/i915/display/intel_dp_link_training.c | 107 +++++++++++---
.../drm/i915/display/intel_dp_link_training.h | 6 +
drivers/gpu/drm/i915/display/intel_dp_mst.c | 74 +++++++++-
drivers/gpu/drm/i915/display/intel_dp_mst.h | 1 +
include/drm/display/drm_dp_mst_helper.h | 2 +
10 files changed, 361 insertions(+), 41 deletions(-)
--
2.44.2
