On Fri, Jun 07, 2024 at 03:21:22PM +0300, Jani Nikula wrote: > On Fri, 07 Jun 2024, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote: > > On Fri, Jun 07, 2024 at 01:51:29PM +0300, Jani Nikula wrote: > >> Remove the unused HSW_STEREO_3D_CTL register macros. > > > > I don't enjoy having to trawl the specs to find registers. I really doubt that this register will be ever useful for anything. IIRC it was not even useful when we introduced it. > > So I prefer to keep everything that isn't actually wrong. on this side we could just get the autogenerated headers from spec and dump them all here with all the bits, is this what we really want? > > Shall I apply this [1] then? ack from my side on either way. > > BR, > Jani. > > > [1] https://lore.kernel.org/r/76f980f5ed3638746c6b58dec7d0bd8c43a37987.1717514638.git.jani.nikula@xxxxxxxxx > > > > > >> > >> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> > >> --- > >> drivers/gpu/drm/i915/i915_reg.h | 6 ------ > >> 1 file changed, 6 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > >> index 2d834c32a3fa..127b113189ef 100644 > >> --- a/drivers/gpu/drm/i915/i915_reg.h > >> +++ b/drivers/gpu/drm/i915/i915_reg.h > >> @@ -3385,12 +3385,6 @@ > >> #define ADL_TVIDEO_DIP_AS_SDP_DATA(dev_priv, trans, i) _MMIO_TRANS2(dev_priv, trans,\ > >> _ADL_VIDEO_DIP_AS_DATA_A + (i) * 4) > >> > >> -#define _HSW_STEREO_3D_CTL_A 0x70020 > >> -#define S3D_ENABLE (1 << 31) > >> -#define _HSW_STEREO_3D_CTL_B 0x71020 > >> - > >> -#define HSW_STEREO_3D_CTL(trans) _MMIO_PIPE2(dev_priv, trans, _HSW_STEREO_3D_CTL_A) > >> - > >> #define _PCH_TRANS_HTOTAL_B 0xe1000 > >> #define _PCH_TRANS_HBLANK_B 0xe1004 > >> #define _PCH_TRANS_HSYNC_B 0xe1008 > >> -- > >> 2.39.2 > > -- > Jani Nikula, Intel
