From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Clean up the bdw+ pipe interrupt bits, and enable some new fault
interrupts on tgl+ and mtl+.
Ville Syrjälä (7):
drm/i915: Use REG_BIT() for bdw+ pipe interrupts
drm/i915: Document bdw+ pipe interrupt bits
drm/i915: Sort bdw+ pipe interrupt bits
drm/i915: Extend GEN9_PIPE_PLANE_FLIP_DONE() to cover all universal
planes
drm/i915: Nuke the intermediate pipe fault bitmasks
drm/i915: Enable pipeDMC fault interrupts on tgl+
drm/i915: Enable plane/pipeDMC ATS fault interrupts on mtl
.../gpu/drm/i915/display/intel_display_irq.c | 49 ++++++++++--
drivers/gpu/drm/i915/i915_reg.h | 80 ++++++++-----------
2 files changed, 79 insertions(+), 50 deletions(-)
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2.44.1
