On Thu, Feb 22, 2024 at 07:27:15PM +0530, Tejas Upadhyay wrote:
> Applying WA 14018778641 only on Compute engine has impact on
14018778641 is not a workaround number. The only lineage numbers that
are relevant to this programming are Wa_18018781329 (for DG2) and
Wa_14018575942 (for MTL/ARL). Even though other things like internal
tickets and work tracking records have similar numbers we should not be
mixing those up with the actual workaround (lineage) numbers.
Matt
> some apps like chrome. Updating this WA to apply on Render
> engine as well as it is helping with performance on Chrome.
>
> Note: There is no concern from media team thus not applying
> WA on media engines. We will revisit if any issues reported
> from media team.
>
> Fixes: 668f37e1ee11 ("drm/i915/mtl: Update workaround 14018778641")
> Signed-off-by: Tejas Upadhyay <tejas.upadhyay@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index d67d44611c28..46607aefc026 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1652,7 +1652,8 @@ pvc_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
> static void
> xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
> {
> - /* Wa_14018575942 / Wa_18018781329 */
> + /* Wa_14018575942 / Wa_14018778641 / Wa_18018781329 */
> + wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB);
> wa_mcr_write_or(wal, COMP_MOD_CTRL, FORCE_MISS_FTLB);
>
> /* Wa_22016670082 */
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
