Series: | drm/i915/dsi: ICL+ DSI modeset sequence fixes (rev2) |
URL: | https://patchwork.freedesktop.org/series/116926/ |
State: | success |
Details: | https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/index.html |
CI Bug Log - changes from CI_DRM_13253 -> Patchwork_116926v2
Summary
SUCCESS
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116926v2/index.html
Participating hosts (35 -> 34)
Missing (1): fi-kbl-soraka
Known issues
Here are the changes found in Patchwork_116926v2 that come from known issues:
IGT changes
Issues hit
-
igt@i915_selftest@live@gt_lrc:
- bat-dg2-11: PASS -> INCOMPLETE (i915#7609 / i915#7913)
-
igt@i915_selftest@live@reset:
-
igt@kms_chamelium_hpd@common-hpd-after-suspend:
- fi-glk-j4005: NOTRUN -> SKIP (fdo#109271)
-
igt@kms_pipe_crc_basic@nonblocking-crc@pipe-c-dp-1:
Possible fixes
-
igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: DMESG-FAIL (i915#5334) -> PASS
-
igt@i915_selftest@live@late_gt_pm:
-
igt@i915_selftest@live@mman:
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
Build changes
- Linux: CI_DRM_13253 -> Patchwork_116926v2
CI-20190529: 20190529
CI_DRM_13253: b5faf562ea160e9dcd7f95b737753ce44134b266 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7322: 2dd77d6d827a308caae49ce3eba759c2bab394ed @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_116926v2: b5faf562ea160e9dcd7f95b737753ce44134b266 @ git://anongit.freedesktop.org/gfx-ci/linux
Linux commits
430cfe4adebd drm/i915/dsi: Remove weird has_pch_encoder asserts
403862f286ee drm/i915/dsi: Grab the crtc from the customary place
c9a83a8c16af drm/i915/dsi: Move panel reset+power off to be the last thing
0eb315508c57 drm/i915/dsi: Respect power_off_delay on icl+
cb97f1341a8a drm/i915/dsi: Do DSC/scaler disable earlier on icl+
a0247abd1c35 drm/i915/dsi: Move most things from .disable() into .post_disable() on icl+
8d7a016914da drm/i915/dsi: Implement encoder->shutdown() for icl+
b3e2d46a3f9c drm/i915/dsi: Respect power cycle delay on icl+
81d11f03bf5a drm/i915/dsi: Gate DSI clocks earlier
0ba7355775f6 drm/i915/dsi: Split icl+ D-PHY vs. DSI timing steps
f39968a588b0 drm/i915/dsi: Print the VBT MIPI sequence delay duration
9c43153c92fb drm/i915/dsi: Do display on sequence later on icl+
fb9cab7a4143 drm/i915/dsi: Do panel power on + reset deassert earlier on icl+