Re: [PATCH i-g-t 1/2] lib/intel_decode: Decode Gen12 ring/batch instructions correctly

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On 4/26/2023 14:51, Dixit, Ashutosh wrote:
On Tue, 25 Apr 2023 13:19:25 -0700, John.C.Harrison@xxxxxxxxx wrote:
@@ -3623,7 +3624,17 @@ decode_3d_965(struct intel_decode *ctx)
		return len;

	case 0x7a00:
-		if (IS_GEN6(devid) || IS_GEN7(devid)) {
+		if (IS_GEN12(devid)) {
+			if (len != 6)
+				fprintf(out, "Bad count in PIPE_CONTROL\n");
+			instr_out(ctx, 0, "PIPE_CONTROL\n");
+			instr_out(ctx, 1, "flags\n");
+			instr_out(ctx, 2, "write address low\n");
+			instr_out(ctx, 3, "write address high\n");
+			instr_out(ctx, 4, "write data low\n");
+			instr_out(ctx, 5, "write data high\n");
+			return len;
Is there a reference for this? I can review but have no idea what's going
on here. The rest of the patch looks good. Thanks.
Just the bspec definition of PIPE_CONTROL. On later gens it has more data - 64bit rather than 32bit addressing I think.

John.


+		} else if (IS_GEN6(devid) || IS_GEN7(devid)) {
			if (len != 4 && len != 5)
				fprintf(out, "Bad count in PIPE_CONTROL\n");

--
2.39.1





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