Thanks for doing this Rodrigo. Review plan: Patches 1-4: Damien Patch 5: Some bikeshed pending from earlier review ... Patch 6-7: Atm in limbo, I've thought they're merged into the x86 tree already. Patch 8: Ville Patch 9-11: Rodrigo Patch 12: lalala ;-) Patch 13: I guess this can wait until we allow userspace to allocate from stolen. So in a way requirements for this are missing from the series. Maybe just drop for now? Patch 14: Merged Patch 15-16: Part of Chris' rps tuning and instrumentation improvements. We need to review the latest versions of these (I'd volunteer Jesse for the rps tuning). Patch 17: Should be tested by someone else with a gt3. Who has one? Cheers, Daniel On Tue, Aug 27, 2013 at 12:50 AM, Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> wrote: > Hi all, > > Let me introduce drm-intel-collector branch: > http://cgit.freedesktop.org/~vivijim/drm-intel/log/?h=drm-intel-collector > > To describe drm-intel-collector I'll quote Daniel: > "The overall idea is to make sure that simple patches don't get lost. > Bigger patch series or feature work tends to not get lost, and really > trivial patches I tend to merge right away. But 1-2 patch stuff in > between is occasionally lost" > > Process: > > 1. Daniel pushs drm-intel-testing > 2. I rebase drm-intel-collector onto drm-intel-testing > 3. I collect all simple (1-2) patches that wasn't yet reviewed and not queued by Daniel > 4. Request automated QA's PRTS automated i-g-t tests comparing drm-intel-testing x drm-intel-collector > 5. If tests are ok I send the patches as a series to intel-gfx mailing list for better tracking and to be reviewed. > > There are some reasons that some patches can be left behind: > 1. It was send so long time ago. I started with patches from Jul 26th. > 2. Your patch didn't applied cleanly and I couldn't easily solve the conflicts. > 3. Kernel didn't compiled with your patch. > 4. I simply missed it. If you believe this is the case please warn me. > > Please help me to get these patches reviewed and queued by Daniel. > > Also, please let me know if you have further ideas how to improve this process. > > Thanks in advance, > Rodrigo. > > Chris Wilson (13): > drm/i915: Do not add an interrupt for a context switch > drm/i915: Rearrange the comments in i915_add_request() > drm/i915: Pin pages whilst mapping the dma-buf > drm/i915: Cancel outstanding modeset workers before suspend > drm/i915: Always prefer CPU relocations with LLC > drm/i915: Report requested frequency alongside current frequency in > debugfs > drm/i915: Move the conditional seqno query into the tracepoint > drm/i915: Add some missing steps to i915_driver_load error path > drm/i915: Asynchronously perform the set-base for a simple modeset > drm/i915: Align tiled scanouts from stolen memory to 256k in the GTT > drm/i915: Apply the force-detect VGA w/a to Valleyview > drm/i915: Pair seqno completion tracepoint with its dispatch > RFM drm/i915: Boost RPS frequency for CPU stalls > > Daniel Vetter (1): > drm/i915: check that the i965g/gm 4G limit is really obeyed > > Jesse Barnes (2): > drm/i915: split PCI IDs out into i915_drm.h v4 > x86: add early quirk for reserving Intel graphics stolen memory v5 > > Rodrigo Vivi (1): > drm/i915: Enable Lower Slice on Haswell GT3. > > arch/x86/kernel/early-quirks.c | 154 +++++++++++++++++++++ > drivers/gpu/drm/i915/i915_debugfs.c | 11 +- > drivers/gpu/drm/i915/i915_dma.c | 19 ++- > drivers/gpu/drm/i915/i915_drv.c | 164 +++++----------------- > drivers/gpu/drm/i915/i915_drv.h | 3 + > drivers/gpu/drm/i915/i915_gem.c | 25 +++- > drivers/gpu/drm/i915/i915_gem_context.c | 12 +- > drivers/gpu/drm/i915/i915_gem_dmabuf.c | 41 +++--- > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 7 +- > drivers/gpu/drm/i915/i915_irq.c | 2 +- > drivers/gpu/drm/i915/i915_reg.h | 20 +-- > drivers/gpu/drm/i915/i915_trace.h | 33 +++-- > drivers/gpu/drm/i915/intel_crt.c | 2 +- > drivers/gpu/drm/i915/intel_display.c | 34 +++-- > include/drm/i915_drm.h | 34 +++++ > include/drm/i915_pciids.h | 211 +++++++++++++++++++++++++++++ > 16 files changed, 566 insertions(+), 206 deletions(-) > create mode 100644 include/drm/i915_pciids.h > > -- > 1.8.1.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx http://lists.freedesktop.org/mailman/listinfo/intel-gfx
