> -----Original Message-----
> From: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
> Sent: Monday, January 30, 2023 5:29 PM
> To: Roper, Matthew D <matthew.d.roper@xxxxxxxxx>; Borah, Chaitanya
> Kumar <chaitanya.kumar.borah@xxxxxxxxx>
> Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH] drm/i915/display: Fix typo for reference
> clock
>
> On Thu, 12 Jan 2023, Matt Roper <matthew.d.roper@xxxxxxxxx> wrote:
> > On Thu, Jan 12, 2023 at 03:11:31PM +0530, Chaitanya Kumar Borah wrote:
> >> Fix typo for reference clock from 24400 to 24000
> >>
> >> Signed-off-by: Chaitanya Kumar Borah
> <chaitanya.kumar.borah@xxxxxxxxx>
> >
> > Fixes: 626426ff9ce4 ("drm/i915/adl_p: Add cdclk support for ADL-P")
> > Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
>
> Pushed to drm-intel-next, thanks for the patch and review.
>
Thank you Jani.
Regards
Chaitanya
> BR,
> Jani.
>
> >
> >> ---
> >> drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
> >> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> >> index 0c107a38f9d0..7e16b655c833 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> >> @@ -1319,7 +1319,7 @@ static const struct intel_cdclk_vals
> adlp_cdclk_table[] = {
> >> { .refclk = 24000, .cdclk = 192000, .divider = 2, .ratio = 16 },
> >> { .refclk = 24000, .cdclk = 312000, .divider = 2, .ratio = 26 },
> >> { .refclk = 24000, .cdclk = 552000, .divider = 2, .ratio = 46 },
> >> - { .refclk = 24400, .cdclk = 648000, .divider = 2, .ratio = 54 },
> >> + { .refclk = 24000, .cdclk = 648000, .divider = 2, .ratio = 54 },
> >>
> >> { .refclk = 38400, .cdclk = 179200, .divider = 3, .ratio = 14 },
> >> { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 },
> >> --
> >> 2.25.1
> >>
>
> --
> Jani Nikula, Intel Open Source Graphics Center
