On Thu, Jan 12, 2023 at 03:11:31PM +0530, Chaitanya Kumar Borah wrote:
> Fix typo for reference clock from 24400 to 24000
>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@xxxxxxxxx>
Fixes: 626426ff9ce4 ("drm/i915/adl_p: Add cdclk support for ADL-P")
Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 0c107a38f9d0..7e16b655c833 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1319,7 +1319,7 @@ static const struct intel_cdclk_vals adlp_cdclk_table[] = {
> { .refclk = 24000, .cdclk = 192000, .divider = 2, .ratio = 16 },
> { .refclk = 24000, .cdclk = 312000, .divider = 2, .ratio = 26 },
> { .refclk = 24000, .cdclk = 552000, .divider = 2, .ratio = 46 },
> - { .refclk = 24400, .cdclk = 648000, .divider = 2, .ratio = 54 },
> + { .refclk = 24000, .cdclk = 648000, .divider = 2, .ratio = 54 },
>
> { .refclk = 38400, .cdclk = 179200, .divider = 3, .ratio = 14 },
> { .refclk = 38400, .cdclk = 192000, .divider = 2, .ratio = 10 },
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
