Re: [PATCH 17/17] drm/i915: Add comments about units of latency values

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On Fri, Aug 02, 2013 at 07:09:31PM +0300, Ville Syrjälä wrote:
> On Fri, Aug 02, 2013 at 12:58:07PM -0300, Paulo Zanoni wrote:
> > 2013/8/1  <ville.syrjala@xxxxxxxxxxxxxxx>:
> > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > >
> > > All the ILK+ WM compute functions take the latency values in 0.1us
> > > units. Add a few comments to remind people about that.
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > 
> > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
> > 
> > (but I would have written Latency instead of latency :P )
> 
> I was considering going for full blown kernel-doc, but since we don't
> currently generate docs for i915, i just used the name of the argument
> in question.

We'll get there ;-) For kerneldoc I think we should first still plug some
holes in drm core, but those get filled fast. Next up is properly
documenting the userspace ioctl interface and related stuff. Then we can
tackle real kerneldoc for important functions. Probably still a few years
off ;-)

I've (hopefully) merged all the remaining patches in this series with the
exception of the fixup for the very first patch. Please resend that cute
little bikeshed.

Thanks for the patches&reivew.
-Daniel

> 
> > > ---
> > >  drivers/gpu/drm/i915/intel_pm.c | 17 ++++++++++++++---
> > >  1 file changed, 14 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > index 5fe8c4e..51f445f 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -2108,6 +2108,7 @@ static uint32_t ilk_pipe_pixel_rate(struct drm_device *dev,
> > >         return pixel_rate;
> > >  }
> > >
> > > +/* latency must be in 0.1us units. */
> > >  static uint32_t ilk_wm_method1(uint32_t pixel_rate, uint8_t bytes_per_pixel,
> > >                                uint32_t latency)
> > >  {
> > > @@ -2122,6 +2123,7 @@ static uint32_t ilk_wm_method1(uint32_t pixel_rate, uint8_t bytes_per_pixel,
> > >         return ret;
> > >  }
> > >
> > > +/* latency must be in 0.1us units. */
> > >  static uint32_t ilk_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
> > >                                uint32_t horiz_pixels, uint8_t bytes_per_pixel,
> > >                                uint32_t latency)
> > > @@ -2185,7 +2187,10 @@ enum hsw_data_buf_partitioning {
> > >         HSW_DATA_BUF_PART_5_6,
> > >  };
> > >
> > > -/* For both WM_PIPE and WM_LP. */
> > > +/*
> > > + * For both WM_PIPE and WM_LP.
> > > + * mem_value must be in 0.1us units.
> > > + */
> > >  static uint32_t ilk_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
> > >                                    uint32_t mem_value,
> > >                                    bool is_lp)
> > > @@ -2212,7 +2217,10 @@ static uint32_t ilk_compute_pri_wm(struct hsw_pipe_wm_parameters *params,
> > >         return min(method1, method2);
> > >  }
> > >
> > > -/* For both WM_PIPE and WM_LP. */
> > > +/*
> > > + * For both WM_PIPE and WM_LP.
> > > + * mem_value must be in 0.1us units.
> > > + */
> > >  static uint32_t ilk_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
> > >                                    uint32_t mem_value)
> > >  {
> > > @@ -2232,7 +2240,10 @@ static uint32_t ilk_compute_spr_wm(struct hsw_pipe_wm_parameters *params,
> > >         return min(method1, method2);
> > >  }
> > >
> > > -/* For both WM_PIPE and WM_LP. */
> > > +/*
> > > + * For both WM_PIPE and WM_LP.
> > > + * mem_value must be in 0.1us units.
> > > + */
> > >  static uint32_t ilk_compute_cur_wm(struct hsw_pipe_wm_parameters *params,
> > >                                    uint32_t mem_value)
> > >  {
> > > --
> > > 1.8.1.5
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> > 
> > 
> > 
> > -- 
> > Paulo Zanoni
> 
> -- 
> Ville Syrjälä
> Intel OTC
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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