Re: [PATCH 13/39] drm/i915: move dpll under display.dpll

[Lucas De Marchi <lucas.demarchi@xxxxxxxxx>]

On Thu, Aug 11, 2022 at 06:07:24PM +0300, Jani Nikula wrote:
> Move display related members under drm_i915_private display sub-struct.
>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c        |  12 +-
> drivers/gpu/drm/i915/display/intel_ddi.c      |  24 ++--
> drivers/gpu/drm/i915/display/intel_display.c  |   4 +-
> .../gpu/drm/i915/display/intel_display_core.h |  21 ++++
> .../drm/i915/display/intel_display_debugfs.c  |   8 +-
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 112 +++++++++---------
> .../gpu/drm/i915/display/intel_pch_refclk.c   |   2 +-
> drivers/gpu/drm/i915/gvt/handlers.c           |   4 +-
> drivers/gpu/drm/i915/i915_drv.h               |  21 ----
> 9 files changed, 104 insertions(+), 104 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 5dcfa7feffa9..49357e4ed3be 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -641,13 +641,13 @@ static void gen11_dsi_gate_clocks(struct intel_encoder *encoder)
> 	u32 tmp;
> 	enum phy phy;
>
> -	mutex_lock(&dev_priv->dpll.lock);
> +	mutex_lock(&dev_priv->display.dpll.lock);
> 	tmp = intel_de_read(dev_priv, ICL_DPCLKA_CFGCR0);
> 	for_each_dsi_phy(phy, intel_dsi->phys)
> 		tmp |= ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy);
>
> 	intel_de_write(dev_priv, ICL_DPCLKA_CFGCR0, tmp);
> -	mutex_unlock(&dev_priv->dpll.lock);
> +	mutex_unlock(&dev_priv->display.dpll.lock);
> }
>
> static void gen11_dsi_ungate_clocks(struct intel_encoder *encoder)
> @@ -657,13 +657,13 @@ static void gen11_dsi_ungate_clocks(struct intel_encoder *encoder)
> 	u32 tmp;
> 	enum phy phy;
>
> -	mutex_lock(&dev_priv->dpll.lock);
> +	mutex_lock(&dev_priv->display.dpll.lock);
> 	tmp = intel_de_read(dev_priv, ICL_DPCLKA_CFGCR0);
> 	for_each_dsi_phy(phy, intel_dsi->phys)
> 		tmp &= ~ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy);
>
> 	intel_de_write(dev_priv, ICL_DPCLKA_CFGCR0, tmp);
> -	mutex_unlock(&dev_priv->dpll.lock);
> +	mutex_unlock(&dev_priv->display.dpll.lock);
> }
>
> static bool gen11_dsi_is_clock_enabled(struct intel_encoder *encoder)
> @@ -693,7 +693,7 @@ static void gen11_dsi_map_pll(struct intel_encoder *encoder,
> 	enum phy phy;
> 	u32 val;
>
> -	mutex_lock(&dev_priv->dpll.lock);
> +	mutex_lock(&dev_priv->display.dpll.lock);
>
> 	val = intel_de_read(dev_priv, ICL_DPCLKA_CFGCR0);
> 	for_each_dsi_phy(phy, intel_dsi->phys) {
> @@ -709,7 +709,7 @@ static void gen11_dsi_map_pll(struct intel_encoder *encoder,
>
> 	intel_de_posting_read(dev_priv, ICL_DPCLKA_CFGCR0);
>
> -	mutex_unlock(&dev_priv->dpll.lock);
> +	mutex_unlock(&dev_priv->display.dpll.lock);
> }
>
> static void
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index a4c8493f3ce7..23c8287b0262 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1425,7 +1425,7 @@ hsw_set_signal_levels(struct intel_encoder *encoder,
> static void _icl_ddi_enable_clock(struct drm_i915_private *i915, i915_reg_t reg,
> 				  u32 clk_sel_mask, u32 clk_sel, u32 clk_off)
> {
> -	mutex_lock(&i915->dpll.lock);
> +	mutex_lock(&i915->display.dpll.lock);
>
> 	intel_de_rmw(i915, reg, clk_sel_mask, clk_sel);
>
> @@ -1435,17 +1435,17 @@ static void _icl_ddi_enable_clock(struct drm_i915_private *i915, i915_reg_t reg,
> 	 */
> 	intel_de_rmw(i915, reg, clk_off, 0);
>
> -	mutex_unlock(&i915->dpll.lock);
> +	mutex_unlock(&i915->display.dpll.lock);
> }
>
> static void _icl_ddi_disable_clock(struct drm_i915_private *i915, i915_reg_t reg,
> 				   u32 clk_off)
> {
> -	mutex_lock(&i915->dpll.lock);
> +	mutex_lock(&i915->display.dpll.lock);
>
> 	intel_de_rmw(i915, reg, 0, clk_off);
>
> -	mutex_unlock(&i915->dpll.lock);
> +	mutex_unlock(&i915->display.dpll.lock);
> }
>
> static bool _icl_ddi_is_clock_enabled(struct drm_i915_private *i915, i915_reg_t reg,
> @@ -1720,12 +1720,12 @@ static void icl_ddi_tc_enable_clock(struct intel_encoder *encoder,
> 	intel_de_write(i915, DDI_CLK_SEL(port),
> 		       icl_pll_to_ddi_clk_sel(encoder, crtc_state));
>
> -	mutex_lock(&i915->dpll.lock);
> +	mutex_lock(&i915->display.dpll.lock);
>
> 	intel_de_rmw(i915, ICL_DPCLKA_CFGCR0,
> 		     ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port), 0);
>
> -	mutex_unlock(&i915->dpll.lock);
> +	mutex_unlock(&i915->display.dpll.lock);
> }
>
> static void icl_ddi_tc_disable_clock(struct intel_encoder *encoder)
> @@ -1734,12 +1734,12 @@ static void icl_ddi_tc_disable_clock(struct intel_encoder *encoder)
> 	enum tc_port tc_port = intel_port_to_tc(i915, encoder->port);
> 	enum port port = encoder->port;
>
> -	mutex_lock(&i915->dpll.lock);
> +	mutex_lock(&i915->display.dpll.lock);
>
> 	intel_de_rmw(i915, ICL_DPCLKA_CFGCR0,
> 		     0, ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port));
>
> -	mutex_unlock(&i915->dpll.lock);
> +	mutex_unlock(&i915->display.dpll.lock);
>
> 	intel_de_write(i915, DDI_CLK_SEL(port), DDI_CLK_SEL_NONE);
> }
> @@ -1824,7 +1824,7 @@ static void skl_ddi_enable_clock(struct intel_encoder *encoder,
> 	if (drm_WARN_ON(&i915->drm, !pll))
> 		return;
>
> -	mutex_lock(&i915->dpll.lock);
> +	mutex_lock(&i915->display.dpll.lock);
>
> 	intel_de_rmw(i915, DPLL_CTRL2,
> 		     DPLL_CTRL2_DDI_CLK_OFF(port) |
> @@ -1832,7 +1832,7 @@ static void skl_ddi_enable_clock(struct intel_encoder *encoder,
> 		     DPLL_CTRL2_DDI_CLK_SEL(pll->info->id, port) |
> 		     DPLL_CTRL2_DDI_SEL_OVERRIDE(port));
>
> -	mutex_unlock(&i915->dpll.lock);
> +	mutex_unlock(&i915->display.dpll.lock);
> }
>
> static void skl_ddi_disable_clock(struct intel_encoder *encoder)
> @@ -1840,12 +1840,12 @@ static void skl_ddi_disable_clock(struct intel_encoder *encoder)
> 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> 	enum port port = encoder->port;
>
> -	mutex_lock(&i915->dpll.lock);
> +	mutex_lock(&i915->display.dpll.lock);
>
> 	intel_de_rmw(i915, DPLL_CTRL2,
> 		     0, DPLL_CTRL2_DDI_CLK_OFF(port));
>
> -	mutex_unlock(&i915->dpll.lock);
> +	mutex_unlock(&i915->display.dpll.lock);
> }
>
> static bool skl_ddi_is_clock_enabled(struct intel_encoder *encoder)
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 7db4ac27364d..efc0fa648736 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1487,7 +1487,7 @@ static void intel_encoders_update_prepare(struct intel_atomic_state *state)
> 	 * Make sure the DPLL state is up-to-date for fastset TypeC ports after non-blocking commits.
> 	 * TODO: Update the DPLL state for all cases in the encoder->update_prepare() hook.
> 	 */
> -	if (i915->dpll.mgr) {
> +	if (i915->display.dpll.mgr) {
> 		for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
> 			if (intel_crtc_needs_modeset(new_crtc_state))
> 				continue;
> @@ -5839,7 +5839,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>
> 	PIPE_CONF_CHECK_BOOL(double_wide);
>
> -	if (dev_priv->dpll.mgr) {
> +	if (dev_priv->display.dpll.mgr) {
> 		PIPE_CONF_CHECK_P(shared_dpll);
>
> 		PIPE_CONF_CHECK_X(dpll_hw_state.dpll);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
> index 748d2a84e20e..f12ff36fef07 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -12,6 +12,7 @@
>
> #include "intel_display.h"
> #include "intel_dmc.h"
> +#include "intel_dpll_mgr.h"
> #include "intel_gmbus.h"
>
> struct drm_i915_private;
> @@ -24,6 +25,7 @@ struct intel_color_funcs;
> struct intel_crtc;
> struct intel_crtc_state;
> struct intel_dpll_funcs;
> +struct intel_dpll_mgr;

if you include intel_dpll_mgr.h you don't need the fwd declaration?


Reviewed-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx>


Lucas De Marchi