to be honest I didn't understood the other idea with forcewake, but this way is fine for me, so: Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com> On Thu, Jul 4, 2013 at 3:42 PM, Ben Widawsky <ben at bwidawsk.net> wrote: > We need it before we set the pte_encode function pointers, which happens > really early, in gtt_init. > > The problem with just doing the normal sequence earlier is we don't have > the ability to use forcewake until after the pte functions have been set > up. > > Since all solutions are somewhat ugly (barring rewriting all the init > ordering), I've opted to do the detection really early, and the enabling > later - since the register to detect doesn't require forcewake. > > Signed-off-by: Ben Widawsky <ben at bwidawsk.net> > --- > drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++++ > drivers/gpu/drm/i915/i915_gem.c | 9 +-------- > 2 files changed, 11 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c > index 0e22142..7eda8ab 100644 > --- a/drivers/gpu/drm/i915/i915_dma.c > +++ b/drivers/gpu/drm/i915/i915_dma.c > @@ -1524,6 +1524,16 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) > > intel_early_sanitize_regs(dev); > > + if (IS_HASWELL(dev) && (I915_READ(HSW_EDRAM_PRESENT) == 1)) { > + /* The docs do not explain exactly how the calculation can be > + * made. It is somewhat guessable, but for now, it's always > + * 128MB. > + * NB: We can't write IDICR yet because we do not have gt funcs > + * set up */ > + dev_priv->ellc_size = 128; > + DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size); > + } > + > ret = i915_gem_gtt_init(dev); > if (ret) > goto put_bridge; > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > index 2df993d..f9834f2 100644 > --- a/drivers/gpu/drm/i915/i915_gem.c > +++ b/drivers/gpu/drm/i915/i915_gem.c > @@ -4153,15 +4153,8 @@ i915_gem_init_hw(struct drm_device *dev) > if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt()) > return -EIO; > > - if (IS_HASWELL(dev) && (I915_READ(HSW_EDRAM_PRESENT) == 1)) { > + if (dev_priv->ellc_size) > I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf)); > - /* The docs do not explain exactly how the calculation can be > - * made. It is somewhat guessable, but for now, it's always > - * 128MB. > - */ > - dev_priv->ellc_size = 128; > - DRM_INFO("Found %zuMB of eLLC\n", dev_priv->ellc_size); > - } > > if (HAS_PCH_NOP(dev)) { > u32 temp = I915_READ(GEN7_MSG_CTL); > -- > 1.8.3 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Rodrigo Vivi Blog: http://blog.vivi.eng.br