| Series: | drm/i915: Make fastset not suck and allow seamless M/N changes (rev4) |
| URL: | https://patchwork.freedesktop.org/series/103491/ |
| State: | success |
| Details: | https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103491v4/index.html |
CI Bug Log - changes from CI_DRM_11607 -> Patchwork_103491v4
Summary
SUCCESS
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103491v4/index.html
Participating hosts (41 -> 40)
Additional (2): bat-adlm-1 bat-dg2-9
Missing (3): bat-dg2-8 fi-rkl-11600 fi-bsw-cyan
Known issues
Here are the changes found in Patchwork_103491v4 that come from known issues:
IGT changes
Issues hit
-
igt@i915_selftest@live@execlists:
- fi-bsw-kefka: PASS -> INCOMPLETE (i915#5801 / i915#5847)
-
igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-8809g: PASS -> DMESG-FAIL (i915#5334)
-
igt@kms_chamelium@common-hpd-after-suspend:
-
fi-hsw-g3258: NOTRUN -> SKIP (fdo#109271 / fdo#111827)
-
fi-snb-2600: NOTRUN -> SKIP (fdo#109271 / fdo#111827)
-
-
igt@runner@aborted:
Possible fixes
-
igt@i915_selftest@live@hangcheck:
-
fi-hsw-g3258: INCOMPLETE (i915#3303 / i915#4785) -> PASS
-
{fi-ehl-2}: INCOMPLETE (i915#5134) -> PASS
-
fi-snb-2600: INCOMPLETE (i915#3921) -> PASS
-
-
igt@i915_selftest@live@requests:
- {bat-rpls-1}: INCOMPLETE (i915#4983 / i915#5338) -> PASS
-
igt@kms_flip@basic-flip-vs-modeset@b-edp1:
- {bat-adlp-6}: DMESG-WARN (i915#3576) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
Build changes
- Linux: CI_DRM_11607 -> Patchwork_103491v4
CI-20190529: 20190529
CI_DRM_11607: b0f0de5bb000952abb29696adb93f289e49b129c @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6465: f6bb4399881a806fbff75ce3df89b60286d55917 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_103491v4: b0f0de5bb000952abb29696adb93f289e49b129c @ git://anongit.freedesktop.org/gfx-ci/linux
Linux commits
940d8c3ae7e3 drm/i915: Round TMDS clock to nearest
974d1f0f2f47 drm/i915: Round to closest in M/N calculations
1ee98a0e8064 drm/i915: Use a fixed N value always
4f6da868519b drm/i915: Require an exact DP link freq match for the DG2 PLL
e6528bc1b478 drm/i915: Allow M/N change during fastset on bdw+
c61b8c7394c9 drm/i915: Add intel_panel_highest_mode()
28216b3c7e50 drm/i915: Check hw.enable and hw.active in intel_pipe_config_compare()
ec03a48feaa4 drm/i915: Skip intel_modeset_pipe_config_late() if the pipe is not enabled
feab306ca85b drm/i915: Nuke fastet state copy hacks
77cfcaa85641 drm/i915: Set active dpll early for icl+
a95aebd02268 drm/i915: Make all clock checks non-fuzzy
73adc42965f8 drm/i915: Make M/N checks non-fuzzy
9dad727d1830 drm/i915: Skip FDI vs. dotclock sanity check during readout
89b67046c1ce drm/i915: Compute clocks earlier
b3171a362400 drm/i915: Feed the DPLL output freq back into crtc_state
8bd35246ef57 drm/i915: Introduce struct iclkip_params
80358929fadb drm/i915: Extract intel_crtc_dotclock()
a16a168a5a0c drm/i915: Improve modeset debugs
7030a2cd7cb7 drm/i915: s/pipe_config/crtc_state/
e68b09f90e06 drm/i915: Adjust intel_modeset_pipe_config() & co. calling convention
d8d0963f2a10 drm/i915: Extract PIPE_CONF_CHECK_RECT()
fee56952e76c drm/i915: Extract PIPE_CONF_CHECK_TIMINGS()
c449b9a0548d drm/i915: Reassign DPLLs only for crtcs going throug .compute_config()
bcfb20e75d14 drm/i915: Clean up DPLL related debugs
eb226d9ddd6a drm/i915: Do .crtc_compute_clock() earlier
dff87200df64 drm/i915: Split shared dpll .get_dplls() into compute and get phases
