✗ Fi.CI.BAT: failure for drm/i915: Clean up some dpll stuff (rev5)

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Title: Project List - Patchwork
Patch Details
Series:drm/i915: Clean up some dpll stuff (rev5)
URL:https://patchwork.freedesktop.org/series/100899/
State:failure
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22522/index.html

CI Bug Log - changes from CI_DRM_11346 -> Patchwork_22522

Summary

FAILURE

Serious unknown changes coming with Patchwork_22522 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22522, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22522/index.html

Participating hosts (43 -> 36)

Additional (2): fi-icl-u2 fi-pnv-d510
Missing (9): bat-dg1-6 bat-dg1-5 bat-dg2-9 fi-bsw-cyan bat-adlp-6 bat-adlp-4 fi-ctg-p8600 bat-jsl-2 bat-jsl-1

Possible new issues

Here are the unknown changes that may have been introduced in Patchwork_22522:

IGT changes

Possible regressions

Known issues

Here are the changes found in Patchwork_22522 that come from known issues:

IGT changes

Issues hit

Possible fixes

Build changes

CI-20190529: 20190529
CI_DRM_11346: ab6456d23719e60c20e8cef05a5f322eea134b88 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6373: 82306f1903c0fee8371f43a156d8b63163ca61c1 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22522: 4e4731b80638e8ebc109bec470fc9c88531d9857 @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

4e4731b80638 drm/i915: Remove struct dp_link_dpll
f34aa622ddc3 drm/i915: Populate bxt/glk DPLL clock limits a bit more
eac8052ba31c drm/i915: Replace hand rolled bxt vco calculation with chv_calc_dpll_params()
c8e385c6d172 drm/i915: Replace bxt_clk_div with struct dpll
a1c82a00d170 drm/i915: Store the m2 divider as a whole in bxt_clk_div
55f115fbf893 drm/i915: Clean up bxt/glk PLL registers
7e632d8ad2c0 drm/i915: Remove redundant/wrong comments
56ddff2b45db drm/i915: Store the /5 target clock in struct dpll on vlv/chv


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