On Wed, May 29, 2013 at 09:43:05PM +0200, Daniel Vetter wrote: > This was accidentally broken in the south error interrupt handling > work: > > commit 8664281b64c457705db72fc60143d03827e75ca9 > Author: Paulo Zanoni <paulo.r.zanoni at intel.com> > Date: Fri Apr 12 17:57:57 2013 -0300 > > drm/i915: report Gen5+ CPU and PCH FIFO underruns > > Cc: Paulo Zanoni <paulo.r.zanoni at intel.com> > Cc: Ben Widawsky <ben at bwidawsk.net> > Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch> Reviewed-by: Ben Widawsky <ben at bwidawsk.net> [snip] -- Ben Widawsky, Intel Open Source Technology Center
