On Mon, Oct 04, 2021 at 08:05:32PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Indicate which LTTPR we're currently attempting to train when
> we print which training pattern we're using.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Reviewed-by: Imre Deak <imre.deak@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/g4x_dp.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dp_link_training.c | 11 +++++++----
> drivers/gpu/drm/i915/display/intel_dp_link_training.h | 1 +
> 3 files changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
> index 60ae2ba52006..85a09c3e09e8 100644
> --- a/drivers/gpu/drm/i915/display/g4x_dp.c
> +++ b/drivers/gpu/drm/i915/display/g4x_dp.c
> @@ -637,7 +637,7 @@ static void intel_dp_enable_port(struct intel_dp *intel_dp,
> /* enable with pattern 1 (as per spec) */
>
> intel_dp_program_link_training_pattern(intel_dp, crtc_state,
> - DP_TRAINING_PATTERN_1);
> + DP_PHY_DPRX, DP_TRAINING_PATTERN_1);
>
> /*
> * Magic for VLV/CHV. We _must_ first set up the register
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index a45569b8c959..6bab097cafd2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -376,7 +376,7 @@ intel_dp_set_link_train(struct intel_dp *intel_dp,
> int len;
>
> intel_dp_program_link_training_pattern(intel_dp, crtc_state,
> - dp_train_pat);
> + dp_phy, dp_train_pat);
>
> buf[0] = dp_train_pat;
> /* DP_TRAINING_LANEx_SET follow DP_TRAINING_PATTERN_SET */
> @@ -404,17 +404,20 @@ static char dp_training_pattern_name(u8 train_pat)
> void
> intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state,
> + enum drm_dp_phy dp_phy,
> u8 dp_train_pat)
> {
> struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> u8 train_pat = intel_dp_training_pattern_symbol(dp_train_pat);
> + char phy_name[10];
>
> if (train_pat != DP_TRAINING_PATTERN_DISABLE)
> drm_dbg_kms(&dev_priv->drm,
> - "[ENCODER:%d:%s] Using DP training pattern TPS%c\n",
> + "[ENCODER:%d:%s] Using DP training pattern TPS%c, at %s\n",
> encoder->base.base.id, encoder->base.name,
> - dp_training_pattern_name(train_pat));
> + dp_training_pattern_name(train_pat),
> + intel_dp_phy_name(dp_phy, phy_name, sizeof(phy_name)));
>
> intel_dp->set_link_train(intel_dp, crtc_state, dp_train_pat);
> }
> @@ -855,7 +858,7 @@ void intel_dp_stop_link_train(struct intel_dp *intel_dp,
> intel_dp->link_trained = true;
>
> intel_dp_disable_dpcd_training_pattern(intel_dp, DP_PHY_DPRX);
> - intel_dp_program_link_training_pattern(intel_dp, crtc_state,
> + intel_dp_program_link_training_pattern(intel_dp, crtc_state, DP_PHY_DPRX,
> DP_TRAINING_PATTERN_DISABLE);
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.h b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
> index 9d24d594368c..6a3a7b37349a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.h
> @@ -19,6 +19,7 @@ void intel_dp_get_adjust_train(struct intel_dp *intel_dp,
> const u8 link_status[DP_LINK_STATUS_SIZE]);
> void intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state,
> + enum drm_dp_phy dp_phy,
> u8 dp_train_pat);
> void intel_dp_set_signal_levels(struct intel_dp *intel_dp,
> const struct intel_crtc_state *crtc_state,
> --
> 2.32.0
>
