[PATCH 00/17] drm/i915/dp: dp 2.0 enabling prep work

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Start enabling DP 2.0 features. It's not complete, but it's a good
start, and should not conflict with anything existing.

Jani Nikula (17):
  drm/dp: add DP 2.0 UHBR link rate and bw code conversions
  drm/dp: use more of the extended receiver cap
  drm/dp: add LTTPR DP 2.0 DPCD addresses
  drm/dp: add helper for extracting adjust 128b/132b TX FFE preset
  drm/i915/dp: use actual link rate values in struct link_config_limits
  drm/i915/dp: read sink UHBR rates
  drm/i915/dg2: add TRANS_DP2_CTL register definition
  drm/i915/dg2: add DG2+ TRANS_DDI_FUNC_CTL DP 2.0 128b/132b mode
  drm/i915/dg2: add TRANS_DP2_VFREQHIGH and TRANS_DP2_VFREQLOW
  drm/i915/dg2: add DG2 UHBR source rates
  drm/i915/dp: add max data rate calculation for UHBR rates
  drm/i915/dp: use 128b/132b TPS2 for UHBR+ link rates
  drm/i915/dp: select 128b/132b channel encoding for UHBR rates
  drm/i915/dg2: configure TRANS_DP2_CTL for DP 2.0
  drm/i915/dg2: use 128b/132b transcoder DDI mode
  drm/i915/dg2: configure TRANS_DP2_VFREQ{HIGH,LOW} for 128b/132b
  drm/i915/dg2: update link training for 128b/132b

 drivers/gpu/drm/drm_dp_helper.c               |  42 ++++++-
 drivers/gpu/drm/i915/display/intel_ddi.c      |  61 +++++++---
 drivers/gpu/drm/i915/display/intel_dp.c       | 109 ++++++++++++++----
 drivers/gpu/drm/i915/display/intel_dp.h       |   4 +-
 .../drm/i915/display/intel_dp_link_training.c |  99 +++++++++++-----
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  17 ++-
 drivers/gpu/drm/i915/i915_reg.h               |  25 +++-
 include/drm/drm_dp_helper.h                   |   6 +
 8 files changed, 289 insertions(+), 74 deletions(-)

-- 
2.20.1




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