On Fri, Feb 26, 2021 at 12:15:54AM -0800, Khaled Almahallawy wrote: > Source needs to write DPCD 103-106 after receiving a PHY request to change > swing/pre-emphasis after reading DPCD 206-207. This is especially needed if > there is a retimer between source and sink and the retimer implements AUX_CH > interception scheme to manage DP PHY settings (e.g. adjusting Swing/Pre-emphasis > equalization level) for DP output channel. If the source doesn't write to > DPCD 103-106, the retimer may not output the requested swing/pre-emphasis and > eventually we fail compliance. > > v2: Rebase and use crtc->lane_count (Imre) > > Signed-off-by: Khaled Almahallawy <khaled.almahallawy@xxxxxxxxx> Reviewed-by: Imre Deak <imre.deak> Sorry for the delay, pushed now, thanks for the patch. > --- > drivers/gpu/drm/i915/display/intel_dp.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 2ec82a5c9f24..1ccf8602b3ef 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -4471,6 +4471,9 @@ static void intel_dp_process_phy_request(struct intel_dp *intel_dp, > > intel_dp_autotest_phy_ddi_enable(intel_dp, crtc_state); > > + drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET, > + intel_dp->train_set, crtc_state->lane_count); > + > drm_dp_set_phy_test_pattern(&intel_dp->aux, data, > link_status[DP_DPCD_REV]); > } > -- > 2.25.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
