✓ Fi.CI.BAT: success for drm/i915: Clean up DPLL stuff

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Title: Project List - Patchwork
Patch Details
Series:drm/i915: Clean up DPLL stuff
URL:https://patchwork.freedesktop.org/series/92577/
State:success
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20627/index.html

CI Bug Log - changes from CI_DRM_10345 -> Patchwork_20627

Summary

SUCCESS

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20627/index.html

Known issues

Here are the changes found in Patchwork_20627 that come from known issues:

IGT changes

Issues hit

Possible fixes

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Participating hosts (41 -> 36)

Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan bat-jsl-1 fi-bdw-samus

Build changes

CI-20190529: 20190529
CI_DRM_10345: 8c6a974b932fbaa798102b4713ceedf3b04227d9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6142: 16e753fc5e1e51395e1df40865c569984a74c5ed @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20627: d6989dbe6a384e292409e64cbce3ac26e9e3c57c @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

d6989dbe6a38 drm/i915: Nuke intel_prepare_shared_dpll()
6be0972a6060 drm/i915: Fold ibx_pch_dpll_prepare() into ibx_pch_dpll_enable()
9ab5635edef8 drm/i915: Fold i9xx_set_pll_dividers() into i9xx_enable_pll()
d57101706e6f drm/i915: Reuse ilk_needs_fb_cb_tune() for the reduced clock as well
13ef7a1fd2ee drm/i915: Call {vlv, chv}_prepare_pll() from {vlv, chv}_enable_pll()
a5fd8442c9f2 drm/i915: Program DPLL P1 dividers consistently
9bb9d3e38217 drm/i915: Remove the 'reg' local variable
a8495dcd7c24 drm/i915: Clean up variable names in old dpll functions
75de79108280 drm/i915: Clean dpll calling convention
1dfbc5556829 drm/i915: Constify struct dpll all over
f38f6423f164 drm/i915: Extract ilk_update_pll_dividers()
f9828f0fa648 drm/i915: Clean up gen2 DPLL readout
85b53fd77510 drm/i915: Set output_types to EDP for vlv/chv DPLL forcing

_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Index of Archives]     [AMD Graphics]     [Linux USB Devel]     [Linux Audio Users]     [Yosemite News]     [Linux Kernel]     [Linux SCSI]

  Powered by Linux