== Series Details == Series: drm/i915: Clean up DPLL stuff URL : https://patchwork.freedesktop.org/series/92577/ State : warning == Summary == $ dim checkpatch origin/drm-tip 85b53fd77510 drm/i915: Set output_types to EDP for vlv/chv DPLL forcing f9828f0fa648 drm/i915: Clean up gen2 DPLL readout f38f6423f164 drm/i915: Extract ilk_update_pll_dividers() 1dfbc5556829 drm/i915: Constify struct dpll all over 75de79108280 drm/i915: Clean dpll calling convention a8495dcd7c24 drm/i915: Clean up variable names in old dpll functions 9bb9d3e38217 drm/i915: Remove the 'reg' local variable a5fd8442c9f2 drm/i915: Program DPLL P1 dividers consistently 13ef7a1fd2ee drm/i915: Call {vlv, chv}_prepare_pll() from {vlv, chv}_enable_pll() -:183: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see Documentation/timers/timers-howto.rst #183: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1566: + udelay(150); total: 0 errors, 0 warnings, 1 checks, 317 lines checked d57101706e6f drm/i915: Reuse ilk_needs_fb_cb_tune() for the reduced clock as well 9ab5635edef8 drm/i915: Fold i9xx_set_pll_dividers() into i9xx_enable_pll() 6be0972a6060 drm/i915: Fold ibx_pch_dpll_prepare() into ibx_pch_dpll_enable() d6989dbe6a38 drm/i915: Nuke intel_prepare_shared_dpll() _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
