On Wed, Apr 24, 2013 at 12:27:59AM +0200, Daniel Vetter wrote: > On Tue, Apr 23, 2013 at 10:39:35PM +0200, Daniel Vetter wrote: > > On Tue, Apr 23, 2013 at 06:27:54PM +0300, Ville Syrj?l? wrote: > > > The g4x docs are a bit confusing though. They seem to indicate the the > > > PIPECONF dither controls only affect DP. > > > > Hm, this could put a pending question from Jesse at ease whether we should > > still enable dithering in the lvds port register on g4x. Can you point me > > at the relevant bspec language? I didn't spot anything when hunting around > > in the docs ... > > Hm, I've done some testing and the pipeconf dithering seems to indeed have > no effect on the lvds panel. I've gotten away since this patch didn't > clear that bit correctly. I'll update the patch. If you can dig out the > Bspec reference, that'd still be great. It's mentioned in the PIPECONF description. "4 | Dithering enable [DevCTG]: This bit enables dithering for DisplayPort 6bpc or 8bpc modes" "3:2 | Dithering type [DevCTG]: This bit selects dithering type for DisplayPort 6bpc or 8bpc modes" Also the description of "7:5 | Bits Per Color [DevCTG]" also talks a lot about DP, which maybe implies that it too only affects DP. For SDVO/HDMI the port register anyway only has 8bpc support so I guess that's covered, but I'm not sure what the deal is with the CRT output. -- Ville Syrj?l? Intel OTC
