From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> We always reserve the same 4 dbuf blocks for the bypass path allocation, so might as well do that when declaring the dbuf size. Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/i915_pci.c | 8 ++++---- drivers/gpu/drm/i915/intel_pm.c | 9 +-------- 2 files changed, 5 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 484d2633894a..981d12702c49 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -647,7 +647,7 @@ static const struct intel_device_info chv_info = { .has_gt_uc = 1, \ .display.has_hdcp = 1, \ .display.has_ipc = 1, \ - .dbuf.size = 896, \ + .dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \ .dbuf.num_slices = 1 #define SKL_PLATFORM \ @@ -720,14 +720,14 @@ static const struct intel_device_info skl_gt4_info = { static const struct intel_device_info bxt_info = { GEN9_LP_FEATURES, PLATFORM(INTEL_BROXTON), - .dbuf.size = 512, + .dbuf.size = 512 - 4, /* 4 blocks for bypass path allocation */ \ }; static const struct intel_device_info glk_info = { GEN9_LP_FEATURES, PLATFORM(INTEL_GEMINILAKE), .display.ver = 10, - .dbuf.size = 1024, + .dbuf.size = 1024 - 4, /* 4 blocks for bypass path allocation */ \ GLK_COLORS, }; @@ -790,7 +790,7 @@ static const struct intel_device_info cml_gt2_info = { #define GEN10_FEATURES \ GEN9_FEATURES, \ GEN(10), \ - .dbuf.size = 1024, \ + .dbuf.size = 1024 - 4, /* 4 blocks for bypass path allocation */ \ .display.has_dsc = 1, \ .has_coherent_ggtt = false, \ GLK_COLORS diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index ced1eb32cb78..8d6ee5ad761e 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4030,14 +4030,7 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state) static int intel_dbuf_size(struct drm_i915_private *dev_priv) { - int ddb_size = INTEL_INFO(dev_priv)->dbuf.size; - - drm_WARN_ON(&dev_priv->drm, ddb_size == 0); - - if (DISPLAY_VER(dev_priv) < 11) - return ddb_size - 4; /* 4 blocks for bypass path allocation */ - - return ddb_size; + return INTEL_INFO(dev_priv)->dbuf.size; } static int intel_dbuf_slice_size(struct drm_i915_private *dev_priv) -- 2.26.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx