Quoting Matthew Auld (2021-01-27 12:48:06)
> From: Imre Deak <imre.deak@xxxxxxxxx>
>
> On DG1 A0/B0 steppings the first 1MB of local memory must be reserved.
> One reason for this is that the 0xA0000-0xB0000 range is not accessible
> by the display, probably since this region is redirected to another
> memory location for legacy VGA compatibility.
>
> BSpec: 50586
> Testcase: igt/kms_big_fb/linear-64bpp-rotate-0
>
> v2:
> - Reserve the memory on B0 as well.
>
> v3: replace DRM_DEBUG/DRM_ERROR with drm_dbg/drm_err
>
> v4: fix the insanity
>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> Signed-off-by: Matthew Auld <matthew.auld@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/gt/intel_region_lmem.c | 45 +++++++++++++++++++++
> 1 file changed, 45 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> index 71bb38706dbf..763b21980d74 100644
> --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
> @@ -143,6 +143,41 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt)
> return mem;
> }
>
> +static bool get_legacy_lowmem_region(struct intel_uncore *uncore,
> + u64 *start, u32 *size)
> +{
> + if (!IS_DG1_REVID(uncore->i915, DG1_REVID_A0, DG1_REVID_B0))
> + return false;
> +
> + *start = 0;
> + *size = SZ_1M;
> +
> + drm_dbg(&uncore->i915->drm, "LMEM: reserved legacy low-memory [0x%llx-0x%llx]\n",
> + *start, *start + *size);
> +
> + return true;
> +}
> +
> +static int reserve_lowmem_region(struct intel_uncore *uncore,
> + struct intel_memory_region *mem)
> +{
> + u64 reserve_start;
> + u32 reserve_size;
> + int ret;
> +
> + if (!get_legacy_lowmem_region(uncore, &reserve_start, &reserve_size))
> + return 0;
> +
> + if (!reserve_size)
> + return 0;
We can remove this check now as well since we can be assured it is
handled for us by get_legacy_lowmem_region()
Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
-Chris
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