On Wed, Dec 16, 2020 at 01:29:16PM +0200, Jani Nikula wrote:
> From: Dave Airlie <airlied@xxxxxxxxxx>
>
> Rework the plane init calls to do the gen test one level higher.
>
> Signed-off-by: Dave Airlie <airlied@xxxxxxxxxx>
> [Jani: fixed up sparse warnings.]
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/Makefile | 1 +
> .../gpu/drm/i915/display/intel_atomic_plane.c | 76 -
> drivers/gpu/drm/i915/display/intel_crtc.c | 16 +-
> drivers/gpu/drm/i915/display/intel_display.c | 1410 +-------
> drivers/gpu/drm/i915/display/intel_display.h | 36 +-
> .../drm/i915/display/intel_display_types.h | 21 +
> .../gpu/drm/i915/display/intel_gen9_plane.c | 2832 +++++++++++++++++
> drivers/gpu/drm/i915/display/intel_sprite.c | 1417 +--------
> 8 files changed, 2931 insertions(+), 2878 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/display/intel_gen9_plane.c
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 42f9c1ca3c08..a4f67c795240 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -211,6 +211,7 @@ i915-y += \
> display/intel_fifo_underrun.o \
> display/intel_frontbuffer.o \
> display/intel_global_state.o \
> + display/intel_gen9_plane.o \
skl_universal_plane.c is what I'd call it.
No corresponding header?
> display/intel_hdcp.o \
> display/intel_hotplug.o \
> display/intel_lpe_audio.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index b5e1ee99535c..10197cc158c1 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -399,50 +399,6 @@ int intel_plane_atomic_check(struct intel_atomic_state *state,
> new_plane_state);
> }
>
> -static struct intel_plane *
> -skl_next_plane_to_commit(struct intel_atomic_state *state,
> - struct intel_crtc *crtc,
> - struct skl_ddb_entry entries_y[I915_MAX_PLANES],
> - struct skl_ddb_entry entries_uv[I915_MAX_PLANES],
> - unsigned int *update_mask)
> -{
> - struct intel_crtc_state *crtc_state =
> - intel_atomic_get_new_crtc_state(state, crtc);
> - struct intel_plane_state *plane_state;
> - struct intel_plane *plane;
> - int i;
> -
> - if (*update_mask == 0)
> - return NULL;
> -
> - for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
> - enum plane_id plane_id = plane->id;
> -
> - if (crtc->pipe != plane->pipe ||
> - !(*update_mask & BIT(plane_id)))
> - continue;
> -
> - if (skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_y[plane_id],
> - entries_y,
> - I915_MAX_PLANES, plane_id) ||
> - skl_ddb_allocation_overlaps(&crtc_state->wm.skl.plane_ddb_uv[plane_id],
> - entries_uv,
> - I915_MAX_PLANES, plane_id))
> - continue;
> -
> - *update_mask &= ~BIT(plane_id);
> - entries_y[plane_id] = crtc_state->wm.skl.plane_ddb_y[plane_id];
> - entries_uv[plane_id] = crtc_state->wm.skl.plane_ddb_uv[plane_id];
> -
> - return plane;
> - }
> -
> - /* should never happen */
> - drm_WARN_ON(state->base.dev, 1);
> -
> - return NULL;
> -}
> -
I wouldn't bother moving the stuff from intel_atomic_plane.c.
They're much higher level stuff than the rest of the moved code.
<snip>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 376cec71b477..c1ddef60e36e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -52,6 +52,7 @@ struct intel_crtc_state;
> struct intel_digital_port;
> struct intel_dp;
> struct intel_encoder;
> +struct intel_initial_plane_config;
> struct intel_load_detect_pipe;
> struct intel_plane;
> struct intel_plane_state;
> @@ -615,23 +616,12 @@ intel_legacy_aux_to_power_domain(enum aux_ch aux_ch);
> void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
> struct intel_crtc_state *crtc_state);
>
> -u16 skl_scaler_calc_phase(int sub, int scale, bool chroma_center);
> void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
> -u32 skl_scaler_get_filter_select(enum drm_scaling_filter filter, int set);
> -void skl_scaler_setup_filter(struct drm_i915_private *dev_priv, enum pipe pipe,
> - int id, int set, enum drm_scaling_filter filter);
> void ilk_pfit_disable(const struct intel_crtc_state *old_crtc_state);
> -u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
> - const struct intel_plane_state *plane_state);
> -u32 glk_plane_color_ctl_crtc(const struct intel_crtc_state *crtc_state);
> -u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
> - const struct intel_plane_state *plane_state);
> -u32 skl_plane_ctl_crtc(const struct intel_crtc_state *crtc_state);
> -u32 skl_plane_stride(const struct intel_plane_state *plane_state,
> - int plane);
> -int skl_check_plane_surface(struct intel_plane_state *plane_state);
> +void skl_detach_scalers(const struct intel_crtc_state *crtc_state);
> int i9xx_check_plane_surface(struct intel_plane_state *plane_state);
> int skl_format_to_fourcc(int format, bool rgb_order, bool alpha);
We seem to have left a lot of functions as non-static that don't need t
be.
<snip>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index b7e208816074..ab2cd4825e2e 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
<snip>
> -static const u32 icl_sdr_y_plane_formats[] = {
> - DRM_FORMAT_C8,
> - DRM_FORMAT_RGB565,
> +static const u64 i9xx_plane_format_modifiers[] = {
> + I915_FORMAT_MOD_X_TILED,
> + DRM_FORMAT_MOD_LINEAR,
> + DRM_FORMAT_MOD_INVALID
> +};
> +
> +static const u32 snb_plane_formats[] = {
Have we tried --patience to make this part of the diff legible?
> DRM_FORMAT_XRGB8888,
> DRM_FORMAT_XBGR8888,
> - DRM_FORMAT_ARGB8888,
> - DRM_FORMAT_ABGR8888,
> DRM_FORMAT_XRGB2101010,
> DRM_FORMAT_XBGR2101010,
> - DRM_FORMAT_ARGB2101010,
> - DRM_FORMAT_ABGR2101010,
> + DRM_FORMAT_XRGB16161616F,
> + DRM_FORMAT_XBGR16161616F,
> DRM_FORMAT_YUYV,
> DRM_FORMAT_YVYU,
> DRM_FORMAT_UYVY,
> DRM_FORMAT_VYUY,
> - DRM_FORMAT_Y210,
> - DRM_FORMAT_Y212,
> - DRM_FORMAT_Y216,
> - DRM_FORMAT_XYUV8888,
> - DRM_FORMAT_XVYU2101010,
> - DRM_FORMAT_XVYU12_16161616,
> - DRM_FORMAT_XVYU16161616,
> };
>
> -static const u32 icl_sdr_uv_plane_formats[] = {
> +static const u32 vlv_plane_formats[] = {
> DRM_FORMAT_C8,
> DRM_FORMAT_RGB565,
> DRM_FORMAT_XRGB8888,
> DRM_FORMAT_XBGR8888,
> DRM_FORMAT_ARGB8888,
> DRM_FORMAT_ABGR8888,
> - DRM_FORMAT_XRGB2101010,
> DRM_FORMAT_XBGR2101010,
> - DRM_FORMAT_ARGB2101010,
> DRM_FORMAT_ABGR2101010,
> DRM_FORMAT_YUYV,
> DRM_FORMAT_YVYU,
> DRM_FORMAT_UYVY,
> DRM_FORMAT_VYUY,
> - DRM_FORMAT_NV12,
> - DRM_FORMAT_P010,
> - DRM_FORMAT_P012,
> - DRM_FORMAT_P016,
> - DRM_FORMAT_Y210,
> - DRM_FORMAT_Y212,
> - DRM_FORMAT_Y216,
> - DRM_FORMAT_XYUV8888,
> - DRM_FORMAT_XVYU2101010,
> - DRM_FORMAT_XVYU12_16161616,
> - DRM_FORMAT_XVYU16161616,
> };
>
> -static const u32 icl_hdr_plane_formats[] = {
> +static const u32 chv_pipe_b_sprite_formats[] = {
> DRM_FORMAT_C8,
> DRM_FORMAT_RGB565,
> DRM_FORMAT_XRGB8888,
> @@ -2813,60 +1859,10 @@ static const u32 icl_hdr_plane_formats[] = {
> DRM_FORMAT_XBGR2101010,
> DRM_FORMAT_ARGB2101010,
> DRM_FORMAT_ABGR2101010,
> - DRM_FORMAT_XRGB16161616F,
> - DRM_FORMAT_XBGR16161616F,
> - DRM_FORMAT_ARGB16161616F,
> - DRM_FORMAT_ABGR16161616F,
> DRM_FORMAT_YUYV,
> DRM_FORMAT_YVYU,
> DRM_FORMAT_UYVY,
> DRM_FORMAT_VYUY,
> - DRM_FORMAT_NV12,
> - DRM_FORMAT_P010,
> - DRM_FORMAT_P012,
> - DRM_FORMAT_P016,
> - DRM_FORMAT_Y210,
> - DRM_FORMAT_Y212,
> - DRM_FORMAT_Y216,
> - DRM_FORMAT_XYUV8888,
> - DRM_FORMAT_XVYU2101010,
> - DRM_FORMAT_XVYU12_16161616,
> - DRM_FORMAT_XVYU16161616,
> -};
> -
> -static const u64 skl_plane_format_modifiers_noccs[] = {
> - I915_FORMAT_MOD_Yf_TILED,
> - I915_FORMAT_MOD_Y_TILED,
> - I915_FORMAT_MOD_X_TILED,
> - DRM_FORMAT_MOD_LINEAR,
> - DRM_FORMAT_MOD_INVALID
> -};
> -
> -static const u64 skl_plane_format_modifiers_ccs[] = {
> - I915_FORMAT_MOD_Yf_TILED_CCS,
> - I915_FORMAT_MOD_Y_TILED_CCS,
> - I915_FORMAT_MOD_Yf_TILED,
> - I915_FORMAT_MOD_Y_TILED,
> - I915_FORMAT_MOD_X_TILED,
> - DRM_FORMAT_MOD_LINEAR,
> - DRM_FORMAT_MOD_INVALID
> -};
> -
> -static const u64 gen12_plane_format_modifiers_mc_ccs[] = {
> - I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS,
> - I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
> - I915_FORMAT_MOD_Y_TILED,
> - I915_FORMAT_MOD_X_TILED,
> - DRM_FORMAT_MOD_LINEAR,
> - DRM_FORMAT_MOD_INVALID
> -};
> -
> -static const u64 gen12_plane_format_modifiers_rc_ccs[] = {
> - I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
> - I915_FORMAT_MOD_Y_TILED,
> - I915_FORMAT_MOD_X_TILED,
> - DRM_FORMAT_MOD_LINEAR,
> - DRM_FORMAT_MOD_INVALID
> };
>
--
Ville Syrjälä
Intel
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