Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > Tigerlake is plagued by spontaneous DMAR faults [reason 7, next page > table ptr is invalid] which lead to GPU hangs. These faults occur when > an iommu map is immediately reused. Adding further clflushes and > barriers around either the GTT PTE or iommu PTE updates do not prevent > the faults. So far the only effect has been from inducing a delay > between reuse of the iommu on the GPU. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> Acked-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > --- > drivers/gpu/drm/i915/gt/intel_ggtt.c | 11 ++++++++++- > 1 file changed, 10 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c > index cf94525be2c1..f5b981443117 100644 > --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c > +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c > @@ -101,7 +101,16 @@ static bool needs_idle_maps(struct drm_i915_private *i915) > * Query intel_iommu to see if we need the workaround. Presumably that > * was loaded first. > */ > - return IS_GEN(i915, 5) && IS_MOBILE(i915) && intel_vtd_active(); > + if (!intel_vtd_active()) > + return false; > + > + if (IS_GEN(i915, 5) && IS_MOBILE(i915)) > + return true; > + > + if (IS_GEN(i915, 12)) > + return true; /* XXX DMAR fault reason 7 */ > + > + return false; > } > > void i915_ggtt_suspend(struct i915_ggtt *ggtt) > -- > 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
