Quoting Ville Syrjälä (2020-11-26 14:08:24) > On Thu, Nov 26, 2020 at 10:55:39AM +0000, Chris Wilson wrote: > > Ville noticed that the last mocs entry is used unconditionally by the HW > > when it performs cache evictions, and noted that while the value is not > > meant to be writable by the driver, we should program it to a reasonable > > value nevertheless. > > > > As it turns out, we can change the value of mocs:63 and the value we > > were programming into it would cause hard hangs in conjunction with > > atomic operations. > > > > Suggested-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2707 > > Fixes: 3bbaba0ceaa2 ("drm/i915: Added Programming of the MOCS") > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Cc: Jason Ekstrand <jason@xxxxxxxxxxxxxx> > > Cc: <stable@xxxxxxxxxxxxxxx> # v4.3+ > > --- > > drivers/gpu/drm/i915/gt/intel_mocs.c | 5 ++++- > > 1 file changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c > > index 254873e1646e..6ae512847f64 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_mocs.c > > +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c > > @@ -131,7 +131,10 @@ static const struct drm_i915_mocs_entry skl_mocs_table[] = { > > GEN9_MOCS_ENTRIES, > > MOCS_ENTRY(I915_MOCS_CACHED, > > LE_3_WB | LE_TC_2_LLC_ELLC | LE_LRUM(3), > > - L3_3_WB) > > + L3_3_WB), > > + MOCS_ENTRY(63, > > Wonder if we should give these magic MOCS entries actual names? For a one-off entry that doesn't have a special name in the spec, seems like overkill. I added the comments from the spec that tell us about how the HW is using it. That page has a lot of hidden gems about MOCS on skl. Tons of magic we've missed out on. Ugh. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
