> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Ville > Syrjala > Sent: Thursday, July 16, 2020 10:21 AM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Subject: [PATCH 10/14] drm/i915: Sort CML PCI IDs > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Sort the CML PCI IDs numerically. Some order seems better than > randomness. > > Cc: Alexei Podtelezhnikov <apodtele@xxxxxxxxx> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> > --- > include/drm/i915_pciids.h | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index > db409171d9c3..2d36cbce0ac0 100644 > --- a/include/drm/i915_pciids.h > +++ b/include/drm/i915_pciids.h > @@ -447,10 +447,10 @@ > > /* CML GT1 */ > #define INTEL_CML_GT1_IDS(info) \ > - INTEL_VGA_DEVICE(0x9BA5, info), \ > - INTEL_VGA_DEVICE(0x9BA8, info), \ > + INTEL_VGA_DEVICE(0x9BA2, info), \ > INTEL_VGA_DEVICE(0x9BA4, info), \ > - INTEL_VGA_DEVICE(0x9BA2, info) > + INTEL_VGA_DEVICE(0x9BA5, info), \ > + INTEL_VGA_DEVICE(0x9BA8, info) > > #define INTEL_CML_U_GT1_IDS(info) \ > INTEL_VGA_DEVICE(0x9B21, info), \ > @@ -459,11 +459,11 @@ > > /* CML GT2 */ > #define INTEL_CML_GT2_IDS(info) \ > - INTEL_VGA_DEVICE(0x9BC5, info), \ > - INTEL_VGA_DEVICE(0x9BC8, info), \ > - INTEL_VGA_DEVICE(0x9BC4, info), \ > INTEL_VGA_DEVICE(0x9BC2, info), \ > + INTEL_VGA_DEVICE(0x9BC4, info), \ > + INTEL_VGA_DEVICE(0x9BC5, info), \ > INTEL_VGA_DEVICE(0x9BC6, info), \ > + INTEL_VGA_DEVICE(0x9BC8, info), \ > INTEL_VGA_DEVICE(0x9BE6, info), \ > INTEL_VGA_DEVICE(0x9BF6, info) > > -- > 2.26.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
