> -----Original Message----- > From: Kadiyala, Kishore <kishore.kadiyala@xxxxxxxxx> > Sent: Monday, June 1, 2020 1:06 PM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Kadiyala, Kishore <kishore.kadiyala@xxxxxxxxx>; Ville Syrjala > <ville.syrjala@xxxxxxxxxxxxxxx>; Nikula, Jani <jani.nikula@xxxxxxxxx>; Shankar, > Uma <uma.shankar@xxxxxxxxx> > Subject: [PATCH v6] drm/i915: Add Plane color encoding support for > YCBCR_BT2020 > > Currently the plane property doesn't have support for YCBCR_BT2020, which > enables the corresponding color conversion mode on plane CSC. > Enabling the plane property for the planes for GLK & ICL+ platforms. > Also as per spec, update the Plane Color CSC from YUV601_TO_RGB709 to > YUV601_TO_RGB601. > > V2: Enabling support for YCBCT_BT2020 for HDR planes on > platforms GLK & ICL > > V3: Refined the condition check to handle GLK & ICL+ HDR planes > Also added BT2020 handling in glk_plane_color_ctl. > > V4: Combine If-else into single If > > V5: Drop the checking for HDR planes and enable YCBCR_BT2020 > for platforms GLK & ICL+. > > V6: As per Spec, update PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709 > to PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601 as per Ville's > feedback. > > V7: Rebased Pushed the change to dinq. Thanks for the patch and reviews. Regards, Uma Shankar > Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> > Cc: Jani Nikula <jani.nikula@xxxxxxxxx> > Reviewed-by: Uma Shankar <uma.shankar@xxxxxxxxx> > Signed-off-by: Kishore Kadiyala <kishore.kadiyala@xxxxxxxxx> > --- > drivers/gpu/drm/i915/display/intel_display.c | 15 +++++++++++---- > drivers/gpu/drm/i915/display/intel_sprite.c | 9 +++++++-- > drivers/gpu/drm/i915/i915_reg.h | 2 +- > 3 files changed, 19 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index 8f9f9b20d5f5..a9f752d26b4e 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -4812,11 +4812,18 @@ u32 glk_plane_color_ctl(const struct intel_crtc_state > *crtc_state, > plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state); > > if (fb->format->is_yuv && !icl_is_hdr_plane(dev_priv, plane->id)) { > - if (plane_state->hw.color_encoding == > DRM_COLOR_YCBCR_BT709) > + switch (plane_state->hw.color_encoding) { > + case DRM_COLOR_YCBCR_BT709: > plane_color_ctl |= > PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709; > - else > - plane_color_ctl |= > PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709; > - > + break; > + case DRM_COLOR_YCBCR_BT2020: > + plane_color_ctl |= > + > PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020; > + break; > + default: > + plane_color_ctl |= > + PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601; > + } > if (plane_state->hw.color_range == > DRM_COLOR_YCBCR_FULL_RANGE) > plane_color_ctl |= > PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE; > } else if (fb->format->is_yuv) { > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c > b/drivers/gpu/drm/i915/display/intel_sprite.c > index 571c36f929bd..3cd461bf9131 100644 > --- a/drivers/gpu/drm/i915/display/intel_sprite.c > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c > @@ -3061,6 +3061,7 @@ skl_universal_plane_create(struct drm_i915_private > *dev_priv, > struct intel_plane *plane; > enum drm_plane_type plane_type; > unsigned int supported_rotations; > + unsigned int supported_csc; > const u64 *modifiers; > const u32 *formats; > int num_formats; > @@ -3135,9 +3136,13 @@ skl_universal_plane_create(struct drm_i915_private > *dev_priv, > DRM_MODE_ROTATE_0, > supported_rotations); > > + supported_csc = BIT(DRM_COLOR_YCBCR_BT601) | > +BIT(DRM_COLOR_YCBCR_BT709); > + > + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > + supported_csc |= BIT(DRM_COLOR_YCBCR_BT2020); > + > drm_plane_create_color_properties(&plane->base, > - BIT(DRM_COLOR_YCBCR_BT601) | > - BIT(DRM_COLOR_YCBCR_BT709), > + supported_csc, > > BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) | > BIT(DRM_COLOR_YCBCR_FULL_RANGE), > DRM_COLOR_YCBCR_BT709, > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index e9d50fe0f375..578cfe11cbb9 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -6932,7 +6932,7 @@ enum { > #define PLANE_COLOR_INPUT_CSC_ENABLE (1 << 20) /* ICL+ */ > #define PLANE_COLOR_PIPE_CSC_ENABLE (1 << 23) /* Pre-ICL */ > #define PLANE_COLOR_CSC_MODE_BYPASS (0 << 17) > -#define PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709 (1 << 17) > +#define PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601 (1 << 17) > #define PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709 (2 << 17) > #define PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020 (3 << 17) > #define PLANE_COLOR_CSC_MODE_RGB709_TO_RGB2020 (4 << 17) > -- > 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx