Hi Stanislav, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-tip/drm-tip] [also build test WARNING on drm-intel/drm-intel-next-queued] [cannot apply to drm-intel/for-linux-next v5.7-rc7 next-20200529] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Stanislav-Lisovskiy/drm-i915-Fix-wrong-CDCLK-adjustment-changes/20200526-180642 base: git://anongit.freedesktop.org/drm/drm-tip drm-tip compiler: gcc-9 (Debian 9.3.0-13) 9.3.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kbuild test robot <lkp@xxxxxxxxx> cppcheck warnings: (new ones prefixed by >>) >> drivers/gpu/drm/i915/display/intel_bw.c:453:36: warning: Uninitialized variable: pipe [uninitvar] crtc_bw = &new_bw_state->dbuf_bw[pipe]; ^ vim +453 drivers/gpu/drm/i915/display/intel_bw.c 430 431 int skl_bw_calc_min_cdclk(struct intel_atomic_state *state) 432 { 433 struct drm_i915_private *dev_priv = to_i915(state->base.dev); 434 struct intel_bw_state *new_bw_state = NULL; 435 struct intel_bw_state *old_bw_state = NULL; 436 const struct intel_crtc_state *crtc_state; 437 struct intel_crtc *crtc; 438 int max_bw = 0; 439 int slice_id; 440 enum pipe pipe; 441 int i; 442 443 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { 444 enum plane_id plane_id; 445 struct intel_dbuf_bw *crtc_bw; 446 447 new_bw_state = intel_atomic_get_bw_state(state); 448 if (IS_ERR(new_bw_state)) 449 return PTR_ERR(new_bw_state); 450 451 old_bw_state = intel_atomic_get_old_bw_state(state); 452 > 453 crtc_bw = &new_bw_state->dbuf_bw[pipe]; 454 455 memset(&crtc_bw->used_bw, 0, sizeof(crtc_bw->used_bw)); 456 457 for_each_plane_id_on_crtc(crtc, plane_id) { 458 const struct skl_ddb_entry *plane_alloc = 459 &crtc_state->wm.skl.plane_ddb_y[plane_id]; 460 const struct skl_ddb_entry *uv_plane_alloc = 461 &crtc_state->wm.skl.plane_ddb_uv[plane_id]; 462 unsigned int data_rate = crtc_state->data_rate[plane_id]; 463 unsigned int dbuf_mask = 0; 464 465 dbuf_mask |= skl_ddb_dbuf_slice_mask(dev_priv, plane_alloc); 466 dbuf_mask |= skl_ddb_dbuf_slice_mask(dev_priv, uv_plane_alloc); 467 468 /* 469 * FIXME: To calculate that more properly we probably 470 * need to to split per plane data_rate into data_rate_y 471 * and data_rate_uv for multiplanar formats in order not 472 * to get accounted those twice if they happen to reside 473 * on different slices. 474 * However for pre-icl this would work anyway because 475 * we have only single slice and for icl+ uv plane has 476 * non-zero data rate. 477 * So in worst case those calculation are a bit 478 * pessimistic, which shouldn't pose any significant 479 * problem anyway. 480 */ 481 for_each_dbuf_slice_in_mask(slice_id, dbuf_mask) 482 crtc_bw->used_bw[slice_id] += data_rate; 483 } 484 } 485 486 if (!old_bw_state) 487 return 0; 488 489 for_each_pipe(dev_priv, pipe) { 490 struct intel_dbuf_bw *crtc_bw; 491 492 crtc_bw = &new_bw_state->dbuf_bw[pipe]; 493 494 for_each_dbuf_slice(slice_id) { 495 /* 496 * Current experimental observations show that contrary 497 * to BSpec we get underruns once we exceed 64 * CDCLK 498 * for slices in total. 499 * As a temporary measure in order not to keep CDCLK 500 * bumped up all the time we calculate CDCLK according 501 * to this formula for overall bw consumed by slices. 502 */ 503 max_bw += crtc_bw->used_bw[slice_id]; 504 } 505 } 506 507 new_bw_state->min_cdclk = max_bw / 64; 508 509 if (new_bw_state->min_cdclk != old_bw_state->min_cdclk) { 510 int ret = intel_atomic_lock_global_state(&new_bw_state->base); 511 512 if (ret) 513 return ret; 514 } 515 516 return 0; 517 } 518 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
