Quoting Mika Kuoppala (2020-05-07 14:41:22)
> All engines, exception being blitter as it does not
> care about the form, can access compressed surfaces.
>
> So we need to add forced aux table invalidates
> for those engines.
>
> v2: virtual instance masking (Chris)
>
> References: d248b371f747 ("drm/i915/gen12: Invalidate aux table entries forcibly")
> References bspec#43904, hsdes#1809175790
> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Cc: Chuansheng Liu <chuansheng.liu@xxxxxxxxx>
> Cc: Rafael Antognolli <rafael.antognolli@xxxxxxxxx>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 84 +++++++++++++++++++++++++++--
> drivers/gpu/drm/i915/i915_reg.h | 6 +++
> 2 files changed, 85 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index bbdb0e2a4571..2fffedc99806 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -4539,11 +4539,34 @@ static u32 preparser_disable(bool state)
> return MI_ARB_CHECK | 1 << 8 | state;
> }
>
> +static i915_reg_t aux_inv_reg(const struct intel_engine_cs *engine)
> +{
> + static const i915_reg_t vd[] = {
> + GEN12_VD0_AUX_NV,
> + GEN12_VD1_AUX_NV,
> + GEN12_VD2_AUX_NV,
> + GEN12_VD3_AUX_NV,
> + };
> +
> + static const i915_reg_t ve[] = {
> + GEN12_VE0_AUX_NV,
> + GEN12_VE1_AUX_NV,
> + };
> +
> + if (engine->class == VIDEO_DECODE_CLASS)
> + return vd[engine->instance];
> +
> + if (engine->class == VIDEO_ENHANCEMENT_CLASS)
> + return ve[engine->instance];
> +
GEM_BUG_ON("unknown aux_inv_reg");
> + return INVALID_MMIO_REG;
> +}
>
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