> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Sent: Wednesday, April 8, 2020 6:17 PM
> To: Kadiyala, Kishore <kishore.kadiyala@xxxxxxxxx>
> Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx; Shankar, Uma <uma.shankar@xxxxxxxxx>;
> Nikula, Jani <jani.nikula@xxxxxxxxx>
> Subject: Re: [PATCH v3] drm/i915: Add Plane color encoding support for
> YCBCR_BT2020
>
> On Wed, Apr 08, 2020 at 04:43:47PM +0530, Kishore Kadiyala wrote:
> > Currently the plane property doesn't have support for YCBCR_BT2020,
> > which enables the corresponding color conversion mode on plane CSC.
> > In ICL+ platforms , this property setting is confined only to HDR
> > Planes as there is limitation in SDR Planes and while in GLK it set
> > for all planes.
> >
> > V2: Enabling support for YCBCT_BT2020 for HDR planes on
> > platforms GLK & ICL
> >
> > V3: Refined the condition check to handle GLK & ICL+ HDR planes
> > Also added BT2020 handling in glk_plane_color_ctl.
> >
> > Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx>
> > Cc: Uma Shankar <uma.shankar@xxxxxxxxx>
> > Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
> > Signed-off-by: Kishore Kadiyala <kishore.kadiyala@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 12 +++++++++---
> > drivers/gpu/drm/i915/display/intel_sprite.c | 17 +++++++++++++++--
> > 2 files changed, 24 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 70ec301fe6e3..f2dfa61a49fa 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -4808,11 +4808,17 @@ u32 glk_plane_color_ctl(const struct intel_crtc_state
> *crtc_state,
> > plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);
> >
> > if (fb->format->is_yuv && !icl_is_hdr_plane(dev_priv, plane->id)) {
> > - if (plane_state->hw.color_encoding ==
> DRM_COLOR_YCBCR_BT709)
> > + switch (plane_state->hw.color_encoding) {
> > + case DRM_COLOR_YCBCR_BT709:
> > plane_color_ctl |=
> PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
> > - else
> > + break;
> > + case DRM_COLOR_YCBCR_BT2020:
> > + plane_color_ctl |=
> > +
> PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
> > + break;
> > + default:
> > plane_color_ctl |=
> PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709;
> > -
> > + }
> > if (plane_state->hw.color_range ==
> DRM_COLOR_YCBCR_FULL_RANGE)
> > plane_color_ctl |=
> PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
> > } else if (fb->format->is_yuv) {
> > diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
> > b/drivers/gpu/drm/i915/display/intel_sprite.c
> > index deda351719db..237c4b951f02 100644
> > --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> > +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> > @@ -3031,6 +3031,7 @@ skl_universal_plane_create(struct drm_i915_private
> *dev_priv,
> > struct intel_plane *plane;
> > enum drm_plane_type plane_type;
> > unsigned int supported_rotations;
> > + unsigned int supported_csc;
> > const u64 *modifiers;
> > const u32 *formats;
> > int num_formats;
> > @@ -3105,9 +3106,21 @@ skl_universal_plane_create(struct drm_i915_private
> *dev_priv,
> > DRM_MODE_ROTATE_0,
> > supported_rotations);
> >
> > + supported_csc = BIT(DRM_COLOR_YCBCR_BT601) |
> > +BIT(DRM_COLOR_YCBCR_BT709);
> > +
> > + /*
> > + * Setting the CSC BT2020 for all the planes in case of GLK
> > + * While for ICL+ platforms it is set only for HDR planes 1 through 3
> > + * as there are issues seen with SDR planes
>
> What issues are those?
There was an issue on some of the hardcoded matrix values used in SDR planes,
hence it would be good to not enable BT2020 conversion on SDR planes in ICL+
till this gets resolved.
Reference WA: #220884772
"Incorrect plane CSC coefficients for sRGB to Bt2020 :
SDR planes PLANE_COLOR_CTL Plane CSC Mode 100b, RGB709 to RGB2020,
uses hardcoded R-Y coefficient of 0.75 instead of 0.625, resulting in incorrect BT2020
color conversion. WA: Limit RGB709 to RGB2020 conversion to the HDR capable planes"
@Kishore : Please add this as comment here.
> > + */
> > + if ((INTEL_GEN(dev_priv) == 10) || IS_GEMINILAKE(dev_priv))
> > + supported_csc |= BIT(DRM_COLOR_YCBCR_BT2020);
> > + else
> > + if (icl_is_hdr_plane(dev_priv, plane_id))
> > + supported_csc |= BIT(DRM_COLOR_YCBCR_BT2020);
> > +
> > drm_plane_create_color_properties(&plane->base,
> > - BIT(DRM_COLOR_YCBCR_BT601) |
> > - BIT(DRM_COLOR_YCBCR_BT709),
> > + supported_csc,
> >
> BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
> > BIT(DRM_COLOR_YCBCR_FULL_RANGE),
> > DRM_COLOR_YCBCR_BT709,
> > --
> > 2.17.1
>
> --
> Ville Syrjälä
> Intel
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