Matt Roper <matthew.d.roper@xxxxxxxxx> writes:
> This workaround appears under two different numbers (and with somewhat
> confused stepping applicability on ICL). Ultimately it appears we
> should just implement this for all stepping of ICL and EHL.
>
> Note that this is identical to Wa_1407928979:tgl that already exists in
> our driver too...yet another number referencing the same actual
> workaround.
>
> Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index cbfc8d5ebb3e..5176ad1a3976 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1487,6 +1487,14 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
> wa_write_or(wal,
> SUBSLICE_UNIT_LEVEL_CLKGATE,
> GWUNIT_CLKGATE_DIS);
> +
> + /*
> + * Wa_1408767742:icl[a2..forever],ehl[all]
> + * Wa_1605460711:icl[a0..c0]
> + */
> + wa_write_or(wal,
> + GEN7_FF_THREAD_MODE,
> + GEN12_FF_TESSELATION_DOP_GATE_DISABLE);
The gen12 assignment is amusing artefact. But we learn these things
late sometimes. And when we do, we should try to proactively look one gen back.
This was supposed to be fixed in d0, then re-established.
Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx>
> }
>
> if (IS_GEN_RANGE(i915, 9, 12)) {
> --
> 2.24.1
>
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