== Series Details == Series: Refactor Gen11+ SAGV support URL : https://patchwork.freedesktop.org/series/73856/ State : warning == Summary == $ dim checkpatch origin/drm-tip 658365e95a33 drm/i915: Start passing latency as parameter ba654cc920d4 drm/i915: Introduce skl_plane_wm_level accessor. b339bbdf676c drm/i915: Add intel_bw_get_*_state helpers 4d3ce9ab4bc3 drm/i915: Introduce more *_state_changed indicators 1a4b8e91ea4b drm/i915: Refactor intel_can_enable_sagv -:357: CHECK:BOOL_COMPARISON: Using comparison to false is error prone #357: FILE: drivers/gpu/drm/i915/intel_pm.c:3863: + if (state->active_pipe_changes == 0 && state->ddb_state_changed == false) -:394: CHECK:BRACES: Blank lines aren't necessary after an open brace '{' #394: FILE: drivers/gpu/drm/i915/intel_pm.c:3900: + if (new_bw_state->pipe_sagv_mask != old_bw_state->pipe_sagv_mask) { + total: 0 errors, 0 warnings, 2 checks, 720 lines checked 95a34afc3826 drm/i915: Added required new PCode commands d9e474c18262 drm/i915: Restrict qgv points which don't have enough bandwidth. -:357: CHECK:BRACES: Blank lines aren't necessary after an open brace '{' #357: FILE: drivers/gpu/drm/i915/display/intel_bw.c:557: + if (new_bw_state->qgv_points_mask != old_bw_state->qgv_points_mask) { + total: 0 errors, 0 warnings, 1 checks, 406 lines checked a8667395977a drm/i915: Enable SAGV support for Gen12 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx