Re: [PATCH 02/17] drm/i915: Move linetime wms into the crtc state

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On Mon, Jan 20, 2020 at 07:47:12PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> 
> The linetime watermarks really have very little in common with the
> plane watermarks. It looks to be cleaner to simply track them in
> the crtc_state and program them from the normal modeset/fastset
> paths.
> 
> The only dark cloud comes from the fact that the register is
> still supposedly single buffered. So in theory it might still
> need some form of two stage programming. Note that even though
> HSW/BDWhave two stage programming we never computed any special
> intermediate values for the linetime watermarks, and on SKL+
> we don't even have the two stage stuff plugged in since everything
> else is double buffered. So let's assume it's all fine and
> continue doing what we've been doing.
> 
> Actually on HSW/BDW the value should not even change without
> a full modeset since it doesn't account for pfit downscaling.
> Thus only fastboot might be affected. But on SKL+ the pfit
> scaling factor is take into consideration so the value may
> change during any fastset.
> 
> As a bonus we'll plug this thing into the state
> checker/dump now.
> 
> v2: Rebase due to bigjoiner prep
> v2: Only compute ips linetime for IPS capable pipes.
>     Bspec says the register values is ignored for other
>     pipes, but in fact it can't even be written so the
>     state checker becomes unhappy if we don't compute
>     it as zero.
> 
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>

Extracted Stan's r-b from the trybot list (whoops) and pushed the lot:
https://lists.freedesktop.org/archives/intel-gfx-trybot/2020-January/086561.html

Thanks for the reviews.

As Imre pointed out there some further docs/function naming improvements
should probably be done to make the thing a bit less confusing. I'll
look at that as a followup.

-- 
Ville Syrjälä
Intel
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