Quoting Chris Wilson (2020-01-14 10:56:47)
> The rc6 residency starts ticking from 0 from BIOS POST, but the kernel
> starts measuring the time from its boot. If we start measuruing
> I915_PMU_RC6_RESIDENCY while the GT is idle, we start our sampling from
> 0 and then upon first activity (park/unpark) add in all the rc6
> residency since boot. After the first park with the sampler engaged, the
> sleep/active counters are aligned.
>
> v2: With a wakeref to be sure
>
> Fixes: df6a42053513 ("drm/i915/pmu: Ensure monotonic rc6")
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_pmu.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 28a82c849bac..ec0299490dd4 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -637,8 +637,10 @@ static void i915_pmu_enable(struct perf_event *event)
> container_of(event->pmu, typeof(*i915), pmu.base);
> unsigned int bit = event_enabled_bit(event);
> struct i915_pmu *pmu = &i915->pmu;
> + intel_wakeref_t wakeref;
> unsigned long flags;
>
> + wakeref = intel_runtime_pm_get(&i915->runtime_pm);
> spin_lock_irqsave(&pmu->lock, flags);
>
> /*
> @@ -648,6 +650,14 @@ static void i915_pmu_enable(struct perf_event *event)
> BUILD_BUG_ON(ARRAY_SIZE(pmu->enable_count) != I915_PMU_MASK_BITS);
> GEM_BUG_ON(bit >= ARRAY_SIZE(pmu->enable_count));
> GEM_BUG_ON(pmu->enable_count[bit] == ~0);
> +
> + if (pmu->enable_count[bit] == 0 &&
> + config_enabled_mask(I915_PMU_RC6_RESIDENCY) & BIT_ULL(bit)) {
> + pmu->sample[__I915_SAMPLE_RC6_LAST_REPORTED].cur = 0;
I can't decide if it's better to have discrete sampling appear
monotonic, or to reset just in case we drifted far off.
-Chris
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