✓ Fi.CI.BAT: success for TGL TC enabling (rev2)

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== Series Details ==

Series: TGL TC enabling (rev2)
URL   : https://patchwork.freedesktop.org/series/66695/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6917 -> Patchwork_14450
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/

Known issues
------------

  Here are the changes found in Patchwork_14450 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_flink_basic@flink-lifetime:
    - fi-icl-u3:          [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6917/fi-icl-u3/igt@gem_flink_basic@xxxxxxxxxxxxxxxxxxx
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/fi-icl-u3/igt@gem_flink_basic@xxxxxxxxxxxxxxxxxxx

  * igt@i915_selftest@live_reset:
    - fi-icl-u2:          [PASS][3] -> [INCOMPLETE][4] ([fdo#107713])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6917/fi-icl-u2/igt@i915_selftest@live_reset.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/fi-icl-u2/igt@i915_selftest@live_reset.html

  
#### Possible fixes ####

  * igt@gem_ctx_create@basic-files:
    - {fi-tgl-u}:         [INCOMPLETE][5] ([fdo#111735]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6917/fi-tgl-u/igt@gem_ctx_create@xxxxxxxxxxxxxxxx
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/fi-tgl-u/igt@gem_ctx_create@xxxxxxxxxxxxxxxx

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       [INCOMPLETE][7] ([fdo#107718]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6917/fi-blb-e6850/igt@gem_exec_suspend@xxxxxxxxxxxxx
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/fi-blb-e6850/igt@gem_exec_suspend@xxxxxxxxxxxxx

  * igt@gem_mmap_gtt@basic-write-no-prefault:
    - fi-icl-u3:          [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10] +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6917/fi-icl-u3/igt@gem_mmap_gtt@xxxxxxxxxxxxxxxxxxxxxxxxxxxx
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/fi-icl-u3/igt@gem_mmap_gtt@xxxxxxxxxxxxxxxxxxxxxxxxxxxx

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
  [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
  [fdo#106350]: https://bugs.freedesktop.org/show_bug.cgi?id=106350
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111155]: https://bugs.freedesktop.org/show_bug.cgi?id=111155
  [fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735


Participating hosts (53 -> 46)
------------------------------

  Additional (1): fi-bxt-dsi 
  Missing    (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-pnv-d510 fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6917 -> Patchwork_14450

  CI-20190529: 20190529
  CI_DRM_6917: 7ca2b123ae999133223b882e3190955897df8b03 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5191: 63e30122cadaf2798ae2bd44a56cee81a27fbc40 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14450: 1b900733ba119fcbdee1c0b46870f23a53c437e7 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

1b900733ba11 drm/i915/tgl: initialize TC and TBT ports
b1f9d61f9e63 drm/i915/tgl: Fix dkl link training
022a353b953d drm/i915/tgl: Add dkl phy pll calculations
e39a78ba10d4 drm/i915/tgl: Check the UC health of tc controllers after power on
38c47a4902ba drm/i915/icl: Unify disable and enable phy clock gating functions
f5c7aa23907a drm/i915/tgl: Add dkl phy programming sequences
1621e3c6980e drm/i915/tgl: TC helper function to return pin mapping
143be4422b94 drm/i915/tgl: Add support for dkl pll write
d83006386e2a drm/i915/tgl: Add initial dkl pll support
00109016e7c3 drm/i915/tgl: Add dkl phy registers
11a14f2c9d45 drm/i915/tgl/pll: Set update_active_dpll
b46c2208ba4d drm/i915/tgl: Finish modular FIA support on registers
8a9f0a714a82 drm/i915/tgl: Add missing ddi clock select during DP init sequence

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/index.html
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