This is all the patches required to have TC alt-mode working on TGL, no TBT or legacy support intented here but much of the work here will help those. The dkl pll calculation is not 100% ready, so it is using the hardcoded table provided but even with this table it results in a port_clock state mismatch when running at 5.4Ghz. Also I'm still debugging why enable clock gating after link training complete breaks all the following trainings. All of above is noted in the respective commit message. Other than the above the series is pretty much ready for reviews and testing. Make sure you have firmware of TC retimers updated. José Roberto de Souza (5): drm/i915/tgl: Finish modular FIA support on registers drm/i915/icl: Unify disable and enable phy clock gating functions drm/i915/tgl: Fix dkl phy register space addressing drm/i915/tgl: Check the UC health of tc controllers after power on drm/i915: Add dkl phy pll calculations Lucas De Marchi (2): drm/i915/tgl: Add initial dkl pll support drm/i915/tgl: initialize TC and TBT ports Taylor, Clinton A (5): drm/i915/tgl: Add missing ddi clock select during DP init sequence drm/i915/tgl: TC helper function to return pin mapping drm/i915/tgl: Fix driver crash when update_active_dpll is called drm/i915/tgl: Add dkl phy programming sequences drm/i915/tgl: Use dkl pll hardcoded values Vandita Kulkarni (2): drm/i915/tgl: Add dkl phy registers drm/i915/tgl: Add support for dkl pll write drivers/gpu/drm/i915/display/intel_ddi.c | 343 +++++++++++-- drivers/gpu/drm/i915/display/intel_display.c | 9 +- .../drm/i915/display/intel_display_power.c | 16 + drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 456 +++++++++++++++++- drivers/gpu/drm/i915/display/intel_tc.c | 64 ++- drivers/gpu/drm/i915/display/intel_tc.h | 3 + drivers/gpu/drm/i915/i915_drv.h | 3 + drivers/gpu/drm/i915/i915_reg.h | 206 +++++++- 8 files changed, 1006 insertions(+), 94 deletions(-) -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
