== Series Details == Series: DC3CO Support for TGL (rev8) URL : https://patchwork.freedesktop.org/series/64923/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5f6bfdba251e drm/i915/tgl: Add DC3CO required register and bits 0d688fd512cf drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask 5f17b9ab767f drm/i915/tgl: Enable DC3CO state in "DC Off" power well -:56: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see Documentation/timers/timers-howto.rst #56: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:795: + udelay(200); total: 0 errors, 0 warnings, 1 checks, 173 lines checked cc4a3c84e086 drm/i915/tgl: Do modeset to enable and configure DC3CO exitline. 3559a4f92a27 drm/i915/tgl: DC3CO PSR2 helper 799a2cf9ae05 drm/i915/tgl: switch between dc3co and dc5 based on display idleness bbb46e48c0a2 drm/i915/tgl: Add DC3CO counter in i915_dmc_info _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
