For the series: Tested-by: Anuj Phogat <anuj.phogat@xxxxxxxxx> On Fri, Jun 28, 2019 at 5:07 AM Lionel Landwerlin <lionel.g.landwerlin@xxxxxxxxx> wrote: > > When a register is readonly there is not much we can tell about its > value (apart from its default value?). This can be covered by tests > exercising the value of the register from userspace. > > For PS_INVOCATION_COUNT we've got the following piglit tests : > > KHR-GL45.pipeline_statistics_query_tests_ARB.functional_fragment_shader_invocations > > Vulkan CTS tests : > > dEQP-VK.query_pool.statistics_query.fragment_shader_invocations.* > > Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@xxxxxxxxx> > Fixes: 86554f48e511 ("drm/i915/selftests: Verify whitelist of context registers") > --- > drivers/gpu/drm/i915/gt/selftest_workarounds.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c > index f12cb20fe785..a06f96df1bfd 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c > @@ -926,6 +926,9 @@ check_whitelisted_registers(struct intel_engine_cs *engine, > > err = 0; > for (i = 0; i < engine->whitelist.count; i++) { > + if (engine->whitelist.list[i].reg.reg & RING_FORCE_TO_NONPRIV_RD) > + continue; > + > if (!fn(engine, a[i], b[i], engine->whitelist.list[i].reg)) > err = -EINVAL; > } > -- > 2.21.0.392.gf8f6787159e > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx