Hi Matt, Thanks for the enlightening input :-) On 2019/06/25, Matt Roper wrote: > PLANE_CURSOR is basically just an indication that that specific plane is > the one that's also hooked up to the legacy cursor ioctls; like Ville > says, it shouldn't directly indicate that the plane is less > feature-capable than other planes. You can either detect the true > capabilities of the cursor plane by checking for the presence/absence of > other plane properties and/or experimenting with atomic TEST_ONLY > commits to see what's really possible. > Interesting, my understanding was the plane type was a hint about the capabilities. Although yes, userspace must check via TEST_ONLY to ensure the properties chosen will work. > The ideal solution for Intel gen9 hardware would have been to just never > have the driver advertise or program the dedicated hardware cursor at > all, but to instead expose the top-most universal plane to userspace, > describe it as PLANE_CURSOR, and route the legacy cursor ioctl's to that > plane instead. That would allow legacy cursor behavior to work as > usual, but would also allow atomic userspace to use the plane in a more > full-featured manner. I wrote patches to do exactly this a couple years > ago, but sadly we discovered that the universal planes on gen9 have a > slight alpha blending defect that the dedicated hardware cursor does not > exhibit. Thus replacing the hardware cursor with the topmost universal > plane led to a slight regression for existing users and we had to scrap > the whole idea. :-( > > For reference, the relevant patch from a few years ago is here: > https://patchwork.kernel.org/patch/9398571/ > In that thread you mention: "... I believe the color correction settings are different for the universal plane vs the cursor plane (which causes IGT CRC mismatches at the moment and may be visually noticeable if you have good eyes); that shouldn't be hard to track down and fix." Yet above you mention that universal planes have alpha blending defect. Did you confirm that with HW/simulation teams or is that based on the documentation? I would love to read a bit more on the topic. In particular, but not limited to, if this defect is applicable only for plane3 or literally all universal planes. Thanks again, Emil _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
