On Fri, 17 May 2019 18:27:44 +0200, Chris Wilson
<chris@xxxxxxxxxxxxxxxxxx> wrote:
Quoting Michal Wajdeczko (2019-05-17 17:22:27)
When we reset engines using ALL_ENGINES mask, we will do
full GPU reset and GuC will be also affected. Let GuC be
prepared for upcoming reset.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx>
Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx>
---
drivers/gpu/drm/i915/gt/intel_reset.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
b/drivers/gpu/drm/i915/gt/intel_reset.c
index 464369bc55ad..ca6e40b6b4e2 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -564,6 +564,10 @@ static int gen8_reset_engines(struct
drm_i915_private *i915,
*/
}
+ /* We are about to do full GPU reset, don't forget about GuC */
+ if (engine_mask == ALL_ENGINES)
+ intel_uc_reset_prepare(i915);
Eh, this is done in reset_prepare already. The only other path to call
intel_gpu_reset() directly is along sanitization, which should also have
already sanitized the guc as well. No?
There is igt_atomic_reset selftest which does not call reset_prepare.
And since we lost GuC in gen6_reset_engines due to GEN6_GRDOM_FULL,
our later graceful goodbye with GuC was not working.
This is hidden with current GuC fw, but with new ICL fw with CT is was
visible as:
<3> [508.613024] [drm:intel_guc_send_mmio [i915]] *ERROR* MMIO: GuC action
0x4506 failed with error -110 0x4506
<3> [508.613142] [drm:guc_action_deregister_ct_buffer [i915]] *ERROR* CT:
deregister SEND buffer failed; owner=0 err=-110
<3> [508.623521] [drm:intel_guc_send_mmio [i915]] *ERROR* MMIO: GuC action
0x4506 failed with error -110 0x4506
<3> [508.623573] [drm:guc_action_deregister_ct_buffer [i915]] *ERROR* CT:
deregister RECV buffer failed; owner=0 err=-110
Michal
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