On Tue, 30 Apr 2019, "Kulkarni, Vandita" <vandita.kulkarni@xxxxxxxxx> wrote: >> -----Original Message----- >> From: Nikula, Jani >> Sent: Tuesday, April 30, 2019 3:03 PM >> To: Kulkarni, Vandita <vandita.kulkarni@xxxxxxxxx>; intel- >> gfx@xxxxxxxxxxxxxxxxxxxxx >> Cc: Syrjala, Ville <ville.syrjala@xxxxxxxxx>; Shankar, Uma >> <uma.shankar@xxxxxxxxx>; Kulkarni, Vandita <vandita.kulkarni@xxxxxxxxx> >> Subject: Re: [v2 2/3] drm/i915: Fix pipe config mismatch for bpp, output format >> >> On Tue, 30 Apr 2019, Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx> wrote: >> > Read back the pixel fomrat register and get the bpp. >> > >> > v2: Read the PIPE_MISC register (Jani). >> > >> > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx> >> > --- >> > drivers/gpu/drm/i915/icl_dsi.c | 3 +++ >> > drivers/gpu/drm/i915/intel_dsi.h | 1 + >> > drivers/gpu/drm/i915/vlv_dsi.c | 2 +- >> > 3 files changed, 5 insertions(+), 1 deletion(-) >> > >> > diff --git a/drivers/gpu/drm/i915/icl_dsi.c >> > b/drivers/gpu/drm/i915/icl_dsi.c index dbb2712..5cc58b2 100644 >> > --- a/drivers/gpu/drm/i915/icl_dsi.c >> > +++ b/drivers/gpu/drm/i915/icl_dsi.c >> > @@ -1226,6 +1226,7 @@ static void gen11_dsi_get_config(struct >> > intel_encoder *encoder, { >> > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); >> > struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base); >> > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc); >> > >> > /* FIXME: adapt icl_ddi_clock_get() for DSI and use that? */ >> > pipe_config->port_clock = >> > @@ -1233,6 +1234,7 @@ static void gen11_dsi_get_config(struct >> intel_encoder *encoder, >> > pipe_config->base.adjusted_mode.crtc_clock = intel_dsi->pclk; >> > gen11_dsi_get_timings(encoder, pipe_config); >> > pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI); >> > + pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc); >> > } >> > >> > static int gen11_dsi_compute_config(struct intel_encoder *encoder, @@ >> > -1248,6 +1250,7 @@ static int gen11_dsi_compute_config(struct >> intel_encoder *encoder, >> > struct drm_display_mode *adjusted_mode = >> > &pipe_config->base.adjusted_mode; >> > >> > + pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; >> > intel_fixed_panel_mode(fixed_mode, adjusted_mode); >> > intel_pch_panel_fitting(crtc, pipe_config, >> > conn_state->scaling_mode); >> > >> > diff --git a/drivers/gpu/drm/i915/intel_dsi.h >> > b/drivers/gpu/drm/i915/intel_dsi.h >> > index 705a609..cb9e3b9 100644 >> > --- a/drivers/gpu/drm/i915/intel_dsi.h >> > +++ b/drivers/gpu/drm/i915/intel_dsi.h >> > @@ -166,6 +166,7 @@ enum drm_mode_status intel_dsi_mode_valid(struct >> > drm_connector *connector, struct intel_dsi_host *intel_dsi_host_init(struct >> intel_dsi *intel_dsi, >> > const struct mipi_dsi_host_ops >> *funcs, >> > enum port port); >> > +int bdw_get_pipemisc_bpp(struct intel_crtc *crtc); >> >> Until now this was internal to vlv_dsi.c and it was fine. Now, I think I'd move this >> to intel_display.c alongside haswell_set_pipemisc. > Ok, so I ll move thjs to intel_display.c and call it from haswell_get_pipe_config for is_dsi and gen >= 9 I'd actually prefer to call it from dsi encoder code instead. BR, Jani. > Thanks, > Vandita >> >> Ville already has patches to rename haswell_set_pipemisc to bdw_set_pipemisc. >> >> BR, >> Jani. >> >> >> > >> > /* vlv_dsi_pll.c */ >> > int vlv_dsi_pll_compute(struct intel_encoder *encoder, diff --git >> > a/drivers/gpu/drm/i915/vlv_dsi.c b/drivers/gpu/drm/i915/vlv_dsi.c >> > index b4c6583..790ada8 100644 >> > --- a/drivers/gpu/drm/i915/vlv_dsi.c >> > +++ b/drivers/gpu/drm/i915/vlv_dsi.c >> > @@ -260,7 +260,7 @@ static void band_gap_reset(struct drm_i915_private >> *dev_priv) >> > vlv_flisdsi_put(dev_priv); >> > } >> > >> > -static int bdw_get_pipemisc_bpp(struct intel_crtc *crtc) >> > +int bdw_get_pipemisc_bpp(struct intel_crtc *crtc) >> > { >> > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); >> > u32 tmp; >> >> -- >> Jani Nikula, Intel Open Source Graphics Center > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx