On Fri, Mar 15, 2019 at 09:55:47AM -0700, Bob Paauwe wrote: > On Fri, 15 Mar 2019 09:09:11 +0000 > Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote: > > > Quoting Rodrigo Vivi (2019-03-14 22:53:44) > > > On Thu, Mar 14, 2019 at 10:38:39PM +0000, Chris Wilson wrote: > > > > The basic setup of the i915_hw_ppgtt is the same between gen6 and gen8, > > > > so refactor that into a common routine. > > > > > > > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > > > Cc: Bob Paauwe <bob.j.paauwe@xxxxxxxxx> > > > > Cc: Matthew Auld <matthew.william.auld@xxxxxxxxx> > > > > Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> > > > > > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > > > > I've pushed this series so that 36 bits should be a nice and simple drop > > in. > > > > Thank you Bob for preparing these, sorry for not being clear enough on > > the direction I felt the patches should take. > > -Chris > > Thanks Chris, Thanks a lot Chris. > > It was helpful to see how you organized and re-wrote the series. This > was not code I was familiar with when I started so you're guidance > helped a lot. > > Now I get to fix the EHL patches to take advantage of this. cool, so I will split the series into rv-b ones and probably push soon just leaving the ppgt_size one for you to rebase on top... thoughts? > > Bob > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > -- > -- > Bob Paauwe > Bob.J.Paauwe@xxxxxxxxx > IOTG / PED Software Organization > Intel Corp. Folsom, CA > (916) 356-6193 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
